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发表于 2010-5-19 09:35:00
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本帖最后由 yeoks99 于 2010-5-19 18:39 编辑
First, please ensure that the min operating Vcc of the opamp must be lower than the threshold voltage (referred to Vcc) when the reset block's RESET signal goes low. That means the opamp must work before the reset signal goes low.
Second, what is the startup time of the opamp if the VCC is a step input. How long will it starts the current bias and charge up the output of the opamp to VBG+VTH through the millar cap of 3pF. You need to ensure the reset pulse delay must be longer than the startup/setup time of the opamp.
If you meet the above requirements at all corners, you should be able to start the bg circuit. |
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