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与大家共享一本Ic设计的大全
目录：
Preface ..................................................................................................................................... v
Editor-in-Chief ...................................................................................................................... vii
Contributors ........................................................................................................................... ix
SECTION I VLSI Technology
1 Bipolar Technology B. Gunnar Malm, Jan V. Grahn
and Mikael Östling ........................................................................................................... 1-3
2 CMOS/BiCMOS Technology Yasuhiro Katsumata, Tatsuya Ohguro,
Kazumi Inoh, Eiji Morifuji, Takashi Yoshitomi, Hideki Kimijima,
Hideaki Nii, Toyota Morimoto, Hisayo S. Momose, Kuniyoshi Yoshikawa,
Hidemi Ishiuchi and Hiroshi Iwai ...................................................................................... 2-1
3 Silicon-on-Insulator Technology Sorin Cristoloveanu................................................ 3-1
4 SiGe HBT Technology John D. Cressler ...................................................................... 4-1
5 Silicon Carbide Technology Philip G. Neudeck .......................................................... 5-1
6 Passive Components Ashraf Lotfi............................................................................... 6-1
7 Power IC Technologies Akio Nakagawa ..................................................................... 7-1
8 Microelectronics Packaging Bi-Shiou Chiou.............................................................. 8-1
9 Multichip Module Technologies Victor Boyadzhyan and
John Choma, Jr. ............................................................................................................... 9-1
xvi Table of Contents
SECTION II Devices and Their Models
10 Bipolar Junction Transistor Circuits David J. Comer and
Donald T. Comer............................................................................................................ 10-3
11 RF Passive IC Components Thomas H. Lee, Maria del Mar Hershenson,
Sunderarajan S. Mohan, Kirad Samavati and C. Patrick Yue ............................................... 11-1
12 CMOS Fabrication Jeff Jessing ................................................................................. 12-1
13 Analog Circuit Simulation J. Gregory Rollins ........................................................... 13-1
14 Interconnect Modeling and Simulation Michel S. Nakhla and
Ramachandra Achar ....................................................................................................... 14-1
SECTION III Low Power Electronics and Design
15 System-Level Power Management: An Overview Ali Iranli and
Massoud Pedram............................................................................................................ 15-3
16 Communication-Based Design for Nanoscale SoCs Umit Y. Ogras and
Radu Marculescu............................................................................................................ 16-1
17 Power-Aware Architectural Synthesis Robert P. Dick,
Li Shang and Niraj K. Jha ............................................................................................... 17-1
18 Dynamic Voltage Scaling for Low-Power Hard Real-Time Systems
Jihong Kim, Flavius Gruian and Dongkun Shin ................................................................. 18-1
19 Low-Power Microarchitecture Techniques and Compiler
Design Techniques Emil Talpes and Diana Marculescu ............................................... 19-1
20 Architecture and Design Flow Optimizations
for Power-Aware FPGAs Aman Gayasen and
Narayanan Vijaykrishnan................................................................................................ 20-1
21 Technology Scaling and Low-Power Circuit Design
Ali Keshavarzi ................................................................................................................ 21-1
SECTION IV Amplifiers
22 CMOS Amplifier Design Harry W. Li, R. Jacob Baker and
Donald C. Thelen........................................................................................................... 22-3
23 Bipolar Junction Transistor Amplifiers David J. Comer and
Donald T. Comer............................................................................................................ 23-1
Table of Contents xvii
24 High-Frequency Amplifiers Chris Toumazou and
Alison Burdett................................................................................................................ 24-1
25 Operational Transconductance Amplifiers Mohammed Ismail,
Seok-Bae Park, Ayman A. Fayed and R.F. Wassenaar.......................................................... 25-1
SECTION V Logic Circuits
26 Expressions of Logic Functions Saburo Muroga ..................................................... 26-3
27 Basic Theory of Logic Functions Saburo Muroga ................................................... 27-1
28 Simplification of Logic Expressions Saburo Muroga............................................... 28-1
29 Binary Decision Diagrams Shin-ichi Minato and
Saburo Muroga .............................................................................................................. 29-1
30 Logic Synthesis with AND and OR Gates in Two Levels
Saburo Muroga .............................................................................................................. 30-1
31 Sequential Networks Saburo Muroga ....................................................................... 31-1
32 Logic Synthesis with AND and OR Gates in Multi-Levels
Yuichi Nakamura and Saburo Muroga.............................................................................. 32-1
33 Logic Properties of Transistor Circuits Saburo Muroga.......................................... 33-1
34 Logic Synthesis with NAND (or NOR) Gates in Multi-Levels
Saburo Muroga .............................................................................................................. 34-1
35 Logic Synthesis with a Minimum Number of Negative Gates
Saburo Muroga .............................................................................................................. 35-1
36 Logic Synthesizer with Optimizations in Two Phases
Ko Yoshikawa and Saburo Muroga ................................................................................... 36-1
37 Logic Synthesizer by the Transduction Method Saburo Muroga ........................... 37-1
38 Emitter-Coupled Logic Saburo Muroga ................................................................... 38-1
39 CMOS Saburo Muroga .............................................................................................. 39-1
40 Pass Transistors Kazuo Yano and Saburo Muroga........................................................ 40-1
41 Adders Naofumi Takagi, Haruyuki Tago, Charles R. Baugh
and Saburo Muroga........................................................................................................ 41-1
42 Multipliers Naofumi Takagi, Charles R. Baugh and Saburo Muroga ............................... 42-1
xviii Table of Contents
43 Dividers Naofumi Takagi and Saburo Muroga.............................................................. 43-1
44 Full-Custom and Semi-Custom Design Saburo Muroga ........................................ 44-1
45 Programmable Logic Devices Saburo Muroga......................................................... 45-1
46 Gate Arrays Saburo Muroga ...................................................................................... 46-1
47 Field-Programmable Gate Arrays Saburo Muroga .................................................. 47-1
48 Cell-Library Design Approach Saburo Muroga ....................................................... 48-1
49 Comparison of Different Design Approaches Saburo Muroga............................... 49-1
SECTION VI Memory, Registers and System Timing
50 System Timing Baris Taskin, Ivan S. Kourtev and Eby G. Friedman .............................. 50-3
51 ROM/PROM/EPROM Jen-Sheng Hwang ................................................................. 51-1
52 SRAM Yuh-Kuang Tseng ............................................................................................ 52-1
53 Embedded Memory Chung-Yu Wu .......................................................................... 53-1
54 Flash Memories Rick Shih-Jye Shen, Frank Ruei-Ling Lin,
Amy Hsiu-Fen Chou, Evans Ching-Song Yang and
Charles Ching-Hsiang Hsu .............................................................................................. 54-1
55 Dynamic Random Access Memory Kuo-Hsing Cheng............................................. 55-1
56 Content-Addressable Memory Chi-Sheng Lin
and Bin-Da Liu ............................................................................................................. 56-1
57 Low-Power Memory Circuits Martin Margala ........................................................ 57-1
SECTION VII Analog Circuits
58 Nyquist-Rate ADC and DAC Bang-Sup Song .......................................................... 58-3
59 Oversampled Analog-to-Digital and Digital-to-Analog Converters
John W. Fattaruso and Louis A. Williams III...................................................................... 59-1
60 RF Communication Circuits Michiel Steyaert,
Wouter De Cock and Patrick Reynaert .............................................................................. 60-1
61 PLL Circuits Muh-Tian Shiue and Chorng-kuang Wang............................................... 61-1
62 Switched-Capacitor Filters Andrea Baschirotto......................................................... 62-1
Table of Contents xix
SECTION VIII Microprocessor and ASIC
63 Timing and Signal Integrity Analysis Abhijit Dharchoudhury,
David Blaauw and Shantanu Ganguly .............................................................................. 63-3
64 Microprocessor Design Verification Vikram Iyengar............................................... 64-1
65 Microprocessor Layout Method Tanay Karnik........................................................ 65-1
66 Architecture Daniel A. Connors and Wen-mei W. Hwu ................................................ 66-1
67 Logic Synthesis for Field Programmable Gate
Array (FPGA) Technology John Lockwood .............................................................. 67-1
SECTION IX Testing of Digital Systems
68 Design for Testability and Test Architectures Dimitri Kagaris,
Nick Kanopoulos and Spyros Tragoudas ............................................................................ 68-3
69 Automatic Test Pattern Generation Spyros Tragoudas............................................. 69-1
70 Built-In Self-Test Dimitri Kagaris ............................................................................. 70-1
SECTION X Compound Semiconductor Integrated
Circuit Technology
71 Compound Semiconductor Materials Stephen I. Long ........................................... 71-3
72 Compound Semiconductor Devices for Analog
and Digital Circuits Donald B. Estreich .................................................................... 72-1
73 Compound Semiconductor RF Circuits Donald B. Estreich ................................... 73-1
74 High-Speed Circuit Design Principles Stephen I. Long........................................... 74-1
SECTION XI Design Automation
75 Internet-Based Micro-Electronic Design Automation (IMEDA)
Framework Moon Jung Chung and Heechul Kim........................................................ 75-3
76 System-Level Design Alice C. Parker, Yosef Tirat-Gefen and
Suhrid A. Wadekar ......................................................................................................... 76-1
77 Performance Modeling and Analysis Using VHDL and SystemC
Robert H. Klenke, Jonathan A. Andrews and James H. Aylor................................................ 77-1
xx Table of Contents
78 Embedded Computing Systems and Hardware/Software
Co-Design Wayne Wolf ............................................................................................. 78-1
79 Design Automation Technology Roadmap
Donald R. Cottrell .......................................................................................................... 79-1
SECTION XII VLSI Signal Processing
80 Computer Arithmetic for VLSI Signal Processing
Earl E. Swartzlander, Jr. .................................................................................................. 80-5
81 VLSI Architectures for JPEG 2000 EBCOT: Design Techniques
and Challenges Yijun Li and Magdy Bayoumi ............................................................ 81-1
82 VLSI Architectures for Forward Error-Control Decoders
Arshad Ahmed, Seok-Jun Lee, Mohammad Mansour and
Naresh R. Shanbhag ....................................................................................................... 82-1
83 An Exploration of Hardware Architectures for Face Detection
T. Theocharides, C. Nicopoulos, K. Irick, N. Vijaykrishnan and
M.J. Irwin ..................................................................................................................... 83-1
84 Multidimensional Logarithmic Number System Roberto Muscedere,
Vassil S. Dimitrov and Graham A. Jullien.......................................................................... 84-1
SECTION XIII Design Languages
85 Languages for Design and Implementation of Hardware
Zainalabedin Navabi ...................................................................................................... 85-3
86 System Level Design Languages Shahrzad Mirkhani and
Zainalabedin Navabi ...................................................................................................... 86-1
87 RT Level Hardware Description with VHDL Mahsan Rofouei and
Zainalabedin Navabi ...................................................................................................... 87-1
88 Register Transfer Level Hardware Description with Verilog
Zainalabedin Navabi ...................................................................................................... 88-1
89 Register-Transfer Level Hardware Description with SystemC
Shahrzad Mirkhani and Zainalabedin Navabi ................................................................... 89-1
90 System Verilog Saeed Safari ...................................................................................... 90-1
91 VHDL-AMS Hardware Description Language Naghmeh Karimi and
Zainalabedin Navabi ...................................................................................................... 91-1
Table of Contents xxi
92 Verification Languages Hamid Shojaei and Zainalabedin Navabi................................ 92-1
93 ASIC and Custom IC Cell Information Representation
Naghmeh Karimi and Zainalabedin Navabi ...................................................................... 93-1
94 Test Languages Shahrzad Mirkhani and Zainalabedin Navabi ...................................... 94-1
95 Timing Description Languages Naghmeh Karimi and
Zainalabedin Navabi ...................................................................................................... 95-1
96 HDL-Based Tools and Environments Saeed Safari ................................................ 96-1
Index..................................................................................................................................... I-1 |
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发表于 2010-4-22 10:14:46
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