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Cadence® RFIC Design Methodology
Workshop Manual
Product Version 8.1
June 2008
Table of Contents
ABOUT THIS WORKSHOP........................................................................................... 4
MODULE 1: EXECUTABLE SPECIFICATION (EST TIME 45 MIN).................. 20
MODULE 2: SYSTEM CONFORMANCE VALIDATION (EST. TIME 45 MIN) 41
MODULE 3: SPIRAL INDUCTOR DESIGN FLOW (EST. TIME 60 MIN) .......... 63
MODULE 4: RFIC BLOCK CHARACTERIZATION (EST TIME 30 MINS)....... 98
MODULE 5: INTEGER-N PLL SIMULATION GUIDE (EST TIME 90 MIN) ... 141
MODULE 6: BOTTOM-UP MODEL CALIBRATION (EST TIME 45 MINS) ... 227
MODULE 7: FULL-CHIP PERFORMANCE VERIFICATION (EST. TIME 60 MIN) ............................................................................................................................... 247
MODULE 8: FUNCTIONAL VERIFICATION (EST. TIME 50 MINUTES)....... 264
MODULE 9: PARASITIC POST-LAYOUT EXTRACTION (EST TIME 60 MIN) ........................................................................................................................................ 313 |
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