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本帖最后由 testt123 于 2010-1-6 21:20 编辑
Phase lock techniques (third)
PREFACE
NOTATIONI
1 INTROIDUCTION
1.1 Salient Properties of PLLs / 2
1.1.1 Bandwidth / 2
1.1.2 Linearity / 3
1.2 (Organization of the Book / 3
1.3 !Annotated Bibliography / 3
1.3.1 Books / 3
1.3.2 Reprint Volumes / 4
1.3.3 Journal Special Issues / 5
2 TRANSFER FUNCTIONS OF ANALOG PLLs
2.1 [Basic Transfer Functions / 6
2.1.1 Transfer Functions of Individual Elements / 7
2.1.2 Combined Transfer Functions / 8
2.1.3 Characteristic Equation / 9
2.1.4 Nomenclature, Coefficients, and Units / 9
2.2 :Second-Order PLLs / 10
2.2.1 Loop Filters / 10
2.2.2 Order and Type / 12
3 GRAPHICAL AIDS
3.1 Root-Locus Plots / 30
3.1.1 Description of Root-Locus Plots / 30
3.1.2 Stability Criterion / 33
3.1.3 Root Loci of Type 1 PLLs / 33
3.1.4 Root Loci of Type 2 PLLs / 33
3.1.5 Root Loci of Type 3 PLLs / 34
3.1.6 Root Loci of Higher-Order PLLs / 35
3.1.7 Effect of Loop Delay on Root Locus / 38
3.2 Bode Plots / 38
3.2.1 Presentation Options / 38
3.2.2 Stability / 39
3.2.3 Bode Plots of Type I PLLs / 40
3.2.4 Bode Plots of Type 2 PLLs / 43
3.2.5 Bode Plots of Type 3 PLLs / 48
3.3 Nyquist Diagrams / 49
3.4 Nichols Charts / 49
3.4.1 Stability Criterion / 49
3.4.2 M-Contours / 50
3.4.3 Examples of Nichols Charts / 50
3.5 Closed-Loop Frequency-Response Curves / 52
Appendix 3A: Salient Features of Root Loci / 52
3A.l Branches of Root Loci / 53
3A.2 Locus on the Real Axis / 53
3A.3 Locus Intersections with Axes / 54
Appendix 3B: Formats of the Open-Loop Transfer Function
G(s) / 56
3B.l Proportional-Plus-Integral Section / 56
3B.2 High-Frequency Section / 60
3B.3 Calculations / 60
29
2.2.3 Loop Parameters / 12
2.2.4 Frequency Response / 15
2.3 Other Loop Types and Orders / 20
2.3.1 General Definition of Loop Gain K / 20
2.3.2 Examples of Type 1 PLLs / 22
2.3.3 Examples of Type 2 PLLs / 24
2.3.4 Higher-Type PLLs / 28
Reference / 28
•
Distinctive Properties of Digital PLLs / 65
Digital Transfer Function / 66
4.2.1 Configuration of a Digital PLL / 66
4.2.2 Difference Equations / 67
4.2.3 z-Transforms of the Loop Elements / 69
4.2.4 Loop Filter / 70
4.2.5 Loop Transfer Functions / 71
4.2.6 Poles and Zeros / 71
Loop Stability / 73
4.3.1 Type 1 DPLLs / 73
4.3.2 Type 2 DPLLs / 73
4.3.3 Type 3 DPLLs / 74
Root-Locus Plots / 74
4.4.1 Root Loci of Type I DPLLs / 75
4.4.2 Root Loci of Type 2 DPLLs / 75
4.4.3 Root Loci of Type 3 DPLLs / 78
DPLL Frequency Responses: Formulation / 79
Bode Plots and Nichols Charts / 80
4.6.1 Basis of Bode Plots / 80
4.6.2 Bode Stability Criteria / 81
4.6.3 Bode Plots of Example DPLLs / 81
4.6.4 Nichols Chart Example / 83
Time-Continuous Approximation for a DPLL / 85
Frequency-Response Examples / 86
4.8.1 Effect of Delay / 86
4.8.2 Effect of Bandwidth / . 87
Lowpass Filters in the Loop / 88
4.9.1 Infinite Impulse Response Lowpass Filter / 88
4.9.2 Finite Impulse Response Lowpass Filter / 90
Appendix 4A: Stability of Digital Phaselock Loops / 91
4A.l Type 1 DPLL / 92
4A.2 Type 2 DPLL / 93
Reference / 96
4.9
Appendix 3C: Closed-Loop Frequency Responses / 61
3C.l Frequency-Response Formulas / 61
3C.2 Example Frequency-Response Graphs / 61
References / 64
4 DIGITAL PLLs: TRANSFER FUNCTIONS AND
RELATED TOOLS
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