VHDL描述的ad转换和ad转换器有什么区别呢？ 有这个还要ad转换器干嘛

diavs

有什么区别？ 下面是见过的一个VHDL描述的ad转换
Package defining types used by the system memory
PACKAGE rampac IS
             SUBTYPE addr10 IS NATURAL RANGE 0 TO 1023;
             SUBTYPE data16 IS INTEGER RANGE -32768 TO +32767;
             TYPE ram_array IS ARRAY(addr10'LOW TO addr10'HIGH) OF data16;
             CONSTANT z_val : data16 := -1;
END rampac;
Package defining a basic analogue type
PACKAGE adcpac IS
     SUBTYPE analogue IS REAL RANGE -5.0 TO +5.0;
END adcpac;
16-bit Analogue to Digital Converter
USE WORK.rampac.ALL;
USE WORK.adcpac.ALL;
ENTITY adc16 IS
    GENERIC(tconv : TIME := 10 us); --conversion time
    PORT(vin : IN analogue; digout : OUT data16; --input and output
              sc : IN BIT; busy : OUT BIT); --control
END adc16;
ARCHITECTURE behaviour OF adc16 IS
BEGIN
     PROCESS
           VARIABLE digtemp : data16;
           CONSTANT vlsb : analogue := (analogue'HIGH -
analogue'LOW)/REAL(2*ABS(data16'LOW));
     BEGIN
           digtemp := data16'LOW;
           busy <= '0';
           WAIT UNTIL (sc'EVENT AND sc = '0');
           busy <= '1';
           FOR i IN 0 TO (2*data16'HIGH) LOOP
               IF vin >= (analogue'LOW + (REAL(i) + 0.5)*vlsb)
               THEN digtemp := digtemp + 1;
               ELSE EXIT;
               END IF;
           END LOOP;
           WAIT FOR tconv;
           digout <= digtemp;
           busy <= '0';
     END PROCESS;
END behaviour;

atuhappy

这个只是个模型
不是硬件