我来发吧！2009年11月JSSC全集

jeff_zx

1、A 2.4 GHz Low-Power Sixth-Order RF Bandpass $DeltaSigma$ Converter in CMOS
2、Design of a 770-MHz, 70-mW, 8-bit Subranging ADC Using Reference Voltage Precharging Architecture
3、A 4 Gb/s 3-bit Parallel Transmitter With the Crosstalk-Induced Jitter Compensation Using TX Data Timing Control
4、A 1.25–5 GHz Clock Generator With High-Bandwidth Supply-Rejection Using a Regulated-Replica Regulator in 45-nm CMOS
5、A World-Band Triple-Mode 802.11a/b/g SOC in 130-nm CMOS
6、A Hybrid Spur Compensation Technique for Finite-Modulo Fractional-N Phase-Locked Loops
7、ROM-Based Logic (RBL) Design: A Low-Power 16 Bit Multiplier
8、A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder
9、A Power, Performance Scalable Eight-Cores Media Processor for Mobile Multimedia Applications
10、A 0.5 V 4.85 Mbps Dual-Mode Baseband Transceiver With Extended Frequency Calibration for BIOTelemetry Applications
11、Accurate Array-Based Measurement for Subthreshold-Current of MOS Transistors
12、BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel
13、A 1.12 pJ/b Inductive Transceiver With a Fault-Tolerant Network Switch for Multi-Layer Wearable Body Area Network Applications
14、High-Efficiency Differential-Drive CMOS Rectifier for UHF RFIDs
15、A 2.4-GHz Resistive Feedback LNA in 0.13-$mu$m CMOS
16、A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator Redundancy
17、A 10-Bit 500-MS/s 55-mW CMOS ADC
18、A 1-GS/s 6-Bit Two-Channel Two-Step ADC in 0.13-$mu$m CMOS
19、A 107.4 dB SNR Multi-Bit Sigma Delta ADC With 1-PPM THD at $-$0.12 dB From Full Scale Input
20、A CMOS Time-to-Digital Converter (TDC) Based On a Cyclic Time Domain Successive Approximation Interpolation Method
21、Low Phase Noise G$ _{m}$-Boosted Differential Gate-to-Source Feedback Colpitts CMOS VCO
22、RF Oscillator Based on a Passive RC Bandpass Filter
23、An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops
24、A 1.5 GHz All-Digital Spread-Spectrum Clock Generator
25、An 8$,times,$ 5 Gb/s Parallel Receiver With Collaborative Timing Recovery
26、A Delay-Locked Loop Synchronization Scheme for High-Frequency Multiphase Hysteretic DC-DC Converters
27、A 0.13-$mu$ m CMOS 6 Gb/s/pin Memory Transceiver Using Pseudo-Differential Signaling for Removing Common-Mode Noise Due to SSN
28、A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65 nm CMOS
29、Large-Scale SRAM Variability Characterization in 45 nm CMOS
30、A Micropower $DeltaSigma$-Based Interface asic for a Capacitive 3-Axis Micro-Accelerometer

jeff_zx

:):):):)

test120

:)

lcbtg

我靠  这个东西太好了

hihiyc

Thanks for sharing!

haveok77

现在怎么设置了下载时间限制啊 很不方便啊
是不是服务器的负担太大了？

青春成诗

同6楼的哥们。。。

marmor

Thanks a lot

mynameiswtx

真是快啊！！！

pipiw

好东西，谢谢分享