高速DAC SFDR

蓝枫 · 发表于 2009-10-16 20:22:30

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在做低位高速的DAC时，输入信号比较高的频段，仿的时域的波形不好，怎么做FFT频谱分析的时候，SFDR和有效位都很好呢？哪里出问题了呢？

蓝枫 · 发表于 2009-10-16 20:29:17

补充一句从频谱上来看 SFDR 并没有那么高的，怎么显示的结果不对呢？

adanshen · 发表于 2009-10-19 00:09:46

because dac needs a filter to filter out frequency at sample frequency.

fdchou · 发表于 2010-2-3 13:38:40

your waveform is not so bad --> no glitches, no periodic distortions
so SFDR is good

euvis · 发表于 2010-5-16 14:50:48

可能是你DA本身的过，我推荐给你一颗高速DAC，性能如下：

。4:1 Multiplexing for Each Input Bit of DAC
。Double Sampling Rate (DSR) DAC with Analog Output Sampling
。Rate Twice of Clock Rate
。12-bit, > 8-Gsps DAC Output
。12-bit resolution DAC with Double Data Rate (DDR) Latches
• DAC analog output has sampling rate twice of clock input rate
• Complementary analog outputs with 50-Ω back terminations
• Complementary divided-by-2 and divide-by-4 clock LVDS outputs for data
synchronization
• Divide-by-2 and Divide-by-4 clock output drivers with enable/disable control
without interrupting internal operations of the chip
• On-chip 100 ohm termination between each differential LVDS input data and
RESET pair
• 3.5 W power consumption
• TQFP package with Exposed Pad to enhance grounding and heat dissipation
。Full Spectrum SFDR SFDR 60 dBc