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本帖最后由 bdkqh 于 2009-10-13 20:39 编辑
ANUFACTURING PROCESS
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Overview of manufacturing process
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Design rules
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IC packaging
Future Trends in Integrated Circuit Technology
2.1 Introduction
2.2 Manufacturing CMOS Integrated Circuits
2.2.1 The Silicon Wafer
2.2.2 Photolithography
2.2.3 Some Recurring Process Steps
2.2.4 Simplified CMOS Process Flow
2.3 Design Rules — The Contract between
Designer and Process Engineer
2.4 Packaging Integrated Circuits
2.4.1 Package Materials
2.4.2 Interconnect Levels
2.4.3 Thermal Considerations in Packaging
2.5 Perspective — Trends in Process Technology
2.5.1 Short-Term Developments
2.5.2 In the Longer Term
2.6 Summary
CHAPTER 3
THE DEVICES
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Qualitative understanding of MOS devices
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Simple component models for manual analysis
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Detailed component models for SPICE
Impact of process variations
3.1 Introduction
3.2 The Diode
3.2.1 A First Glance at the Diode — The
Depletion Region
3.2.2 Static Behavior
3.2.3 Dynamic, or Transient, Behavior
3.2.4 The Actual Diode—Secondary Effects
3.2.5 The SPICE Diode Model
3.3 The MOS(FET) Transistor
3.3.1 A First Glance at the Device
3.3.2 The MOS Transistor under Static
Conditions
3.3.3 Dynamic Behavior
3.3.4 The Actual MOS Transistor—Some
Secondary Effects
3.3.5 SPICE Models for the MOS Transistor
3.4 A Word on Process Variations
3.5 Perspective: Technology Scaling
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