DIGITAL COMPENSATION OF ERRORS AT THE FRONT-END OF ADCS

kevinwjs · 发表于 2009-8-19 20:40:54

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Chapter 1 Introduction ..............................................................................................1
1.1 Motivation ..................................................................................................1
1.2 Organization ...............................................................................................4
Chapter 2 Nonlinearity at the ADC’s Front-End....................................................7
2.1 Analog-to-Digital Converters .....................................................................7
2.2 Overview of ADC linearity limitations ....................................................10
2.3 Nonlinearity at the acquisition stage ........................................................14
2.3.1 Input dependent charge injection......................................................14
2.3.2 Nonlinearity in the tracking phase....................................................22
2.3.3 Modeling tracking nonlinearity ........................................................25
2.4 Nonlinearity in the input circuit ...............................................................26
2.4.1 Input circuit including transformer...................................................28
2.4.2 Input circuit including amplifier.......................................................33
2.5 Summary...................................................................................................34
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Chapter 3 Digital Correction of Dynamic Nonlinearities .....................................37
3.1 Dynamic error correction using look-up tables ........................................38
3.2 Modeling nonlinear systems with memory using Volterra series ............40
3.3 Proposed digital algorithm .......................................................................41
3.3.1 Digital Correction using linear modeling of the derivative..............42
3.3.1.1 Evaluation of the model: Random noise input…………………44
3.3.1.2 Evaluation of the model: Sinewave input……………………...48
3.3.2 Digital correction using interpolation...............................................50
3.3.2.1 How to do the interpolation?.......................................................51
3.3.2.2 Evaluation of the model………………………………………..52
3.3.3 Nonlinearity correction on a multi-tone input signal .......................56
3.3.4 Algorithm performance in presence of noise ...................................58
3.3.5 Algorithm performance in presence of other circuit non-idealities..59
3.4 Summary...................................................................................................62
Chapter 4 Experimental Results .............................................................................65
4.1 ADC test setup..........................................................................................66
4.2 Implementation of the digital post processing..........................................67
4.2.1 Digital correction scheme.................................................................67
4.2.2 Coefficient calibration ......................................................................69
4.3 Measurement results .................................................................................70
4.3.1 Robustness of the algorithm with temperature variations ................72
4.3.1.1 Analysis of the impact of temperature variation on dynamic
nonlinearity.......................................................................................................73
4.3.2 General applicability of the algorithm..............................................75
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4.3.3 Algorithm performance on different input driving circuits ..............76
4.4 Summary...................................................................................................79
Chapter 5 Impact of Substrate Noise on the Performance of High-Speed ADCs
.....................................................................................................................................81
5.1 ADC architecture......................................................................................82
5.2 Analysis of the impact of substrate noise on flash ADCs ........................84
5.3 Experimental setup ...................................................................................87
5.4 Measurement results .................................................................................89
5.5 Summary...................................................................................................92
Chapter 6 Conclusion...............................................................................................93
6.1 Summary...................................................................................................93
6.2 Suggestions for future work .....................................................................95