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- About this book Minimization of power dissipation in verylarge scale integrated (VLSI) circuits is important to improvereliability and reduce packaging costs. While many techniques haveinvestigated power minimization during the functional (normal) mode ofoperation, it is important to examine the power dissipation during thetest circuit activity is substantially higher during test than duringfunctional operation. For example, during the execution of built-inself-test (BIST) in-field sessions, excessive power dissipation candecrease the reliability of the circuit under test due to highertemperature and current density.Power-Constrained Testing of VLSI Circuits focuseson techniques for minimizing power dissipation during test applicationat logic and register-transfer levels of abstraction of the VLSI designflow. The first part of this book surveys the existing techniques forpower constrained testing of VLSI circuits. In the second part, severaltest automation techniques for reducing power in scan-based sequentialcircuits and BIST data paths are presented.
- Hardcover: 180 pages
- Publisher: Springer; 1 edition (February 28, 2003)
- Language: English
- ISBN-10: 140207235X
- ISBN-13: 978-1402072352
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