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[推荐]Power-Constrained Testing of VLSI Circuits

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发表于 2009-8-9 11:44:34 | 显示全部楼层 |阅读模式

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  •                 About this book                                Minimization of power dissipation in verylarge scale integrated (VLSI) circuits is important to improvereliability and reduce packaging costs. While many techniques haveinvestigated power minimization during the functional (normal) mode ofoperation, it is important to examine the power dissipation during thetest circuit activity is substantially higher during test than duringfunctional operation. For example, during the execution of built-inself-test (BIST) in-field sessions, excessive power dissipation candecrease the reliability of the circuit under test due to highertemperature and current density.Power-Constrained Testing of VLSI Circuits focuseson techniques for minimizing power dissipation during test applicationat logic and register-transfer levels of abstraction of the VLSI designflow. The first part of this book surveys the existing techniques forpower constrained testing of VLSI circuits. In the second part, severaltest automation techniques for reducing power in scan-based sequentialcircuits and BIST data paths are presented.  
  • Hardcover: 180 pages
  • Publisher: Springer; 1 edition (February 28, 2003)
  • Language: English
  • ISBN-10: 140207235X
  • ISBN-13: 978-1402072352

Power Constrained Testing of VLSI Circuits.part1.rar

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 楼主| 发表于 2009-8-9 11:46:05 | 显示全部楼层
上传完毕,共三部分

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Power Constrained Testing of VLSI Circuits.part3.rar

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发表于 2009-9-5 10:22:01 | 显示全部楼层
good, thanks.
头像被屏蔽
发表于 2009-12-3 17:16:05 | 显示全部楼层
提示: 作者被禁止或删除 内容自动屏蔽
发表于 2010-4-20 20:16:45 | 显示全部楼层
thanks
发表于 2010-4-20 20:18:01 | 显示全部楼层
thanks
发表于 2010-7-7 10:36:15 | 显示全部楼层
感謝分享
发表于 2010-8-19 11:35:08 | 显示全部楼层
是不是一系列的博士论文啊?
发表于 2010-8-19 11:52:40 | 显示全部楼层
good, thanks.
发表于 2010-8-20 23:16:17 | 显示全部楼层
顶一下!
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