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部门内部推荐,有意者请将中英文简历发送至：asic_tapeout@hotmail.com
美资公司 LSI 上海研发中心高薪招聘以下职位:
Digital IC Verification Manager
Digital IC Design Engineer
Analog Design Engineer
Analog Verification Engineer
Custom Layout Engineer
Backend DFT Engineer
Requisition Number : 08-2961
Job Title : Digital IC Design Engineer
Country : China (CH)
State/Province/County : Shanghai
City : Shanghai
Requirements/Qualifications (Education) :
Job Qualifications:
- Communicate effectively within a global business environment (must be proficient in both spoken and written English)
- Experience in logic design, synthesis, static timing analysis, and verification
- Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and formal verification
- Experience in developing simulation and verification test benches
- Knowledge of Verilog/VHDL design languages
- Excellent technical troubleshooting and demonstrated problem solving skills
- Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation
Education/Certifications:
Required Degree: BS
Preferred Degree: MS or PhD
Preferred Major: Microelectronics, Electrical Engineering or related discipline
Job Description : Position Description:
A read channel and hard-disk controller SoC digital IC design engineer's duties include working within a highly motivated product development team to create, modify and verify high speed digital integrated circuits. You will support the cross functional team in taking our concepts through to high volume production and assist us in becoming the market leaders in this Mass Storage (hard disk drive) industry.
Job Responsibilities:
- Working with a Architecture/Algorithm Development Team to finalize system architecture for optimal implementation of digital signal processing algorithms, including architectural definition and tradeoffs, die size estimation.
- Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification, formal verification and static timing analysis.
- Perform some transistor level high speed digital integrated circuit design various cells and blocks within custom chips for the hard disk drive industry. Examples of cells and blocks include multiplexers, adders, multipliers, dividers, specific functional macro blocks,
- Work very closely with physical design engineers from floorplan through final parasitic extraction to ensure smallest area and highest performance possible.
************************************************************************************
Analog Design Engineer
City : Shanghai
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- Design high speed analog and mixed-signal integrated circuits within custom chips for the hard disk drive industry
- Work directly with customers to determine system requirements, write specifications and guide customers in the use of pre-amplifier products
- Use high speed electronic characterization equipment to evaluate and debug the functionality of the design once the part is fabricated in silicon
- Provide technical leadership through all phases of product development including test, yield, characterization, reliability analysis, qualification and release to manufacturing
PREFERRED EXPERIENCE:
LSI's Storage Peripherals Group is looking for an experienced custom analog IC designer to join the pre-amplifier design team. At LSI we are committed to innovation and industry leadership. We develop advanced high-speed magneto electronic read/write IC architectures as the basis for our products.
Design team members define, create and modify high-speed custom integrated circuits for hard disk drive (HDD) products using leading edge CMOS and SiGe BiCMOS technologies. Team members support the entire product life cycle beginning with design and moving through test, qualification, release to production and ramp to volume.
- Degree in Electrical Engineering (or related field), MS required, Ph.D. preferred
- Minimum three to five years experience in discrete, transistor level analog circuit design
- Experience with analog and mixed signal IC product design, integration and verification is required
- Strong physical layout knowledge and parasitic component understanding essential
- Process and device physics knowledge critical
- Proven skills using electronic measurement equipment in a lab environment
- Expertise in applied magnetism and recording a strong plus
********************************************************************
Read Channel Digital Verification Manager
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
As a technical manager in the Read Channel Verification team, candidate will manage and
lead a group of verification engineers whose principle role is the functional verification of
Storage read channel mixed-signal IP. Candidate will be expected to provide technical
direction to the team for design, development, and use of a System Verilog based verification
environment and the verification closure of block/chip/system level functions for mixed signal
based IP. Must be willing to follow a disciplined verification methodology and to work closely
with a multi-location, international team. Daily interaction with analog and digital design teams
and multi-location verification team will be expected. Excellent teamwork and communication
skills are required. As a people manager, candidate will be responsible for development and
maintenance of a high performing team, handling all aspects of team's performance
management, and promoting employee development.
PREFERRED EXPERIENCE:
- BSEE/MSEE with 5-10+ years of mixed-signal design and verification experience
required.
- Management experience should include leading technical teams in a dynamic, cross
functional product environment.
- Solid knowledge of the read channel and hard disk drive systems is required.
- Experience with System Verilog, constrained random testing, and functional coverage
methodologies are required.
********************************************************************
Custom Layout Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
LSI's Storage Peripherals Group is looking for an experienced IC physical design engineer to
join the pre-amplifier design team. As a preamp physical design (layout) engineer you will work
closely with circuit design to implement high-speed custom analog designs and develop mask
layouts for customer products. You will join a cross-functional team responsible for developing
leading edge high-speed magneto electronic read/write IC products that ultimately achieve
high volume production.
- Layout high speed analog and mixed-signal custom chips for the hard disk drive industry
- Work directly with a team of engineers to determine floor plan, routing and I/O
requirements for preamp IC's
- Perform IC design rule and connectivity verification and drive products through mask
release flows.
- Contribute to methodology improvements to increase layout and verification efficiency.
PREFERRED EXPERIENCE:
- Bachelor's degree in Electrical Engineering (or related field) or equivalent experience
- Minimum three to five years experience in custom analog IC physical design
- Experience with schematic-driven layout, floor planning, chip level routing, design for
manufacturing and design rule and connectivity verification is required
- Experience using Cadence Virtuoso XL and VCAR router preferred
- Familiarity with both analog and digital layout tools and flows, circuit design concepts and
IC manufacturing processes desired
********************************************************************
Analog Verification Engineer
Position Description:
- Work with a Preamp Development team to create Verilog testbench components and
simulation environment.
- Create product test plans, test cases and perform simulation and debug of Storage
Preamp mixed-signal devices.
- Must be experienced with Verilog and Verilog AMS and knowledgeable with functional
coverage methodologies.
- Ability to follow a disciplined verification methodology and work closely with a
multi-location, international design team.
- Excellent teamwork and communication skills are required.
PREFERRED EXPERIENCE:
- Preferred degree in Electrical or Electronic Engineering.
- BS required, MS or Ph.D. preferred
- The ideal candidate will have 5 years of experience as a member of a Design Verification
team responsible for implementation of a verification environment for mixed-signal
products.
- Knowledge of analog products and circuits.
- Experience with SystemVerilog, functional coverage, and assertions is highly desired
- Experience with successful tapeout of mixed-signal products from verification plan to
sign-off
- Experience with Fault Grading or Formal Verification a plus
- Strong communication skills (must be proficient in both spoken and written English)
- Able to travel internationally (to United States and throughout Asia)
- Understanding of silicon process technologies (CMOS and Bipolar) and device physics
would be a plus.
- Proven analytical skills (application of math and physics to solve problems)
##################################################################################
Backend DFT Engineer
City : Shanghai
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
Duties will include working within a Product Development Team to work on leading edge ASIC
solutions in full custom and SoC environments. Design IC devices in conformance with both
LSI and customer requirements and sound design principles; Place and route (layout) of
integrated circuits to meet design requirements; Prepare project evaluations in conformance
with company policies/procedures; Provide CAD assistance to customer engineers and new
staff as required and/or requested; Keep up-to-date with all technical memos; Attend peer
reviews and provide feedback to ensure success of peer designs. Ideal candidate will have
experience/exposure to ASIC and full custom high-speed digital flows from design handoff
through manufacturing, and specialized in cutting edge DFT implementation and verification in
Deep Sub-Micron technology, which include Scan Chain Insertion, ATPG, MBIST, Logic BIST,
JTAG, etc.. Excellent communication skills are needed, as the existing team spans multiple
locations.
PREFERRED EXPERIENCE:
- Minimum of 2-6 years experience in DFT/design field.
- Possess a strong knowledge of DFT including scan, BIST, on-chip scan compression, fault
models, ATPG and fault simulation.
- Logic design and verification background with experience in STA.
- Exposure/experience in circuit design, place and routing, CTS, design rule and
connectivity verification
- Programming in Perl, tcl and c++ is a plus
- Good analytical and debugging skills
- Extremely disciplined in conducting checks and audits
- Must be technically adept, a strong team player, ability to manage multiple priorities
- Strong written and verbal communication skills
- Ability to interact intelligently and politely with customers
Education/Certifications
Required Degree: BS
Preferred Degree: MS
Preferred Major: Electrical Engineering or related discipline
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发表于 2009-7-2 20:25:23
