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module hello3(b,clk,HEX,reset);
input clk,reset;
output [7:0]HEX;
wire [7:0]HEX;
reg [7:0]l;
output reg [5:0]b;
reg clk_1k,clk_1h;
reg [2:0]p,c;
integer i=40000,j=250;
parameter H=7'b01110110,
E=7'b01111001,
L=7'b00111000,
O=7'b00111111;
always @(posedge clk)
begin
if(i==40000) begin
i<=0;
clk_1k<=~clk_1k;end
else
begin
i<=i+1;
//clk_1k<=0;
end
end
function [7:0]word;
input [2:0]a;
case (a)
3'b000:word=H;
3'B001:word=E;
3'b010:word=L;
3'b011:word=L;
3'b100:word=O;
3'b101:word=O;
default:word=O;
endcase
endfunction
always @(posedge clk_1k)
begin
if (p==3'd5)
p<=3'd0;
else p<=p+3'd1;
end
always @(*)
begin
if (reset)
begin b<=6'b111111;l<=word(3'b000);end
else
case (p)
3'd0:begin b<=6'b111110;l<=word(c) ;end
3'd1:begin b<=6'b111101;l<=word(c+3'd1);end
3'd2:begin b<=6'b111011;l<=word(c+3'd2);end
3'd3:begin b<=6'b110111;l<=word(c+3'd3);end
3'd4:begin b<=6'b101111;l<=word(c+3'd4);end
3'd5:begin b<=6'b011111;l<=word(c+3'd5);end
default:begin b<=6'b111111;l<=word(3'b000);end
endcase
@(posedge clk_1k)
if(j==250)
begin
j<=0;
clk_1h<=~clk_1h;end
else
begin
j<=j+1;
end
end
always @(posedge clk_1h)
begin
if (c==3'b101)
c<=3'b000;
else c<=c+3'd1;
end
assign HEX=l;
endmodule
//应该是这样显示的HELLOO-ELLOOH-LLOOHE-LOOHEL-OOHELL
//但是显示的是HELLOO-ELLOOO-LLOOOO-LOOOOH-OOOOHE-OOOHEL-OOHELL,为什么多了几个状态啊 |
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