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发表于 2009-6-12 19:53:16
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Table of Contents
Preface
Part II: Design for Robustness
vii
Part I: Fractional-N Synthesis
A. van Roermund 1
Practical Design Aspects in Franctional-N Frequency Synthesis
W. Rhee 3
Design and Simulation of Franctional-N Frequency
Synthesizers
M. Perrott 27
Monolithic CMOS Fractional-N Frequency Synthesizer Design for
High Spectral Purity
B. De Muer, M. Steyaert 51
A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional
Synthesiser with 35Hz Frequency Step and Quantization Noise
Compensation
I. Bietti, G. Albasini, E. Temporiti, R. Castello 77
Implementation Aspects of Fractional-N Techniques in
Cellular Handsets
Y. Le Guillou, D. Brunel 97
Fractional-N Phase Locked Loops and it’s Application in the GSM
System
G. Märzinger, B. Neurauter 111
M. Steyaert 129
ESD for Analogue Circuit Design
D. Clarke, A. Righter 131
ESD in Smart Power Processes
G. Croce, A. Andreini, L. Cerati, G. Meneghesso, L. Sponton 169
vi
RF-ESD Co-Design for High Performance CMOS LNAs
P. Leroux, M. Steyaert 207
Improvement of System Robustness through EMC
Optimazation
B. Deutschmann 227
Robustness in Analog Design
M. De Mey 243
Minimizing Undesired Coupling and Interaction in Mixed Signal ICs
T.J. Schmerbeck 255
Part III: Line and Bus Drivers
J. Huijsing 273
Looking to/for Low Power ADSL Drivers in the DSLAM
E. Moons 275
Class-AB Low-Distortion Drivers for ADSL
T. Ferianz 291
Class D Self-Oscillating Line Drivers
T. Piessens, M. Steyaert 309
Class G/H Line Drivers for xDSL
J. Pierdomenico 333
The USB 2.0 Physical Layer: Standard and Implementation
G. den Besten 359
Backplane Transceivers
K. Tam, W. Ellersick, R. Soenneker 379 |
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