Dual loop CDR (clock data recovery) used in high speed transceiver

kkliaw77 · 发表于 2009-3-23 00:23:52

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Hi, i am currently working on dual loop CDR design architecture used in the high speed transceiver. Mostly of the time, i am referring to the IEEE paper but hardly to understand all maybe i am still a beginner to CDR design. Can somehow show me where can i download a good reference book discussing about CDR? One more thing to ask is that what will make the chip to have high bit error rate?

pillar_chen · 发表于 2010-4-3 22:07:44

where can i find the relative reference?

orvlsi · 发表于 2010-4-3 22:10:06

谢了 ,太好了

juhao0122 · 发表于 2011-3-6 11:06:40

Thanks for your sharing!

mengyj0706 · 发表于 2011-3-6 11:14:06

I think razavi has a book talking about CDR a little bit

qchunh · 发表于 2011-3-7 23:02:20

thanks alot~~

q1w2e3p0o9i8 · 发表于 2011-3-9 12:55:15

thanks!!!!!

q1w2e3p0o9i8 · 发表于 2011-3-31 15:59:24

thanks!!!!!!!!!!

harry1862pd · 发表于 2011-4-13 21:43:42

当然是啊

Dual loop CDR (clock data recovery) used in high speed transceiver

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