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发表于 2009-3-24 21:31:02
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first, VCO's phase noise is 30dB/dec within corner frequency and then 20dB/dec. The transferfunction for VCO phase noise in pll is -40dB/dec within zero and then -20dB between zero and ubw, and then 0 higher than ubw. so, only between zero and ubw, vco phase noise contribution is flat.
then, the loop parameters in PLL is mainly for attenuating inband VCO phase noise, you never want inband VCO phase noise dominates. From this point of view, the bandwith should be the higher the better, both for attenuating VCO phase noise and fast settling. However, the constrains are 1, stability 2, spur 3, quantiztion noise 4, When the bandwith is wide enough that VCO noise contribution is as small as the lowpass noise sources contribution at ubw frequecy point, if you go on widening the bandwidth, it will not help improving overall phase noise.
finally, all the designs depand on your psec.
[ 本帖最后由 faithfully 于 2009-3-25 08:47 编辑 ] |
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