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楼主: wuhuhusong

SystemVerilog for Verification

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发表于 2013-6-27 19:49:24 | 显示全部楼层
these constructs can be used to set up effective verification methodologies. Readers should have a working knowledge of the Verilog HDL and preferably have read the "SystemVerilog for Design" book. Familiarity with other verification languages, Object-Oriented programming, constrained-random data generation and assertion languages would be helpful, although these topics will be covered in detail. Other topics to be covered include: Advanced programming features, including dynamic and associative arrays; Multiple processes, synchronization
发表于 2013-6-27 19:50:31 | 显示全部楼层
these constructs can be used to set up effective verification methodologies. Readers should have a working knowledge of the Verilog HDL and preferably have read the "SystemVerilog for Design" book. Familiarity with other verification languages, Object-Oriented programming, constrained-random data generation and assertion languages would be helpful, although these topics will be covered in detail. Other topics to be covered include: Advanced programming features, including dynamic and associative arrays; Multiple processes, synchronization
发表于 2013-8-16 09:03:28 | 显示全部楼层
东西 还可以 排版怎么出问题了 就封面正常  后面的页一放大全偏了
发表于 2013-12-17 14:10:12 | 显示全部楼层
eetop真是太好了,连这也能下到,谢谢楼主分享
发表于 2014-1-14 19:00:18 | 显示全部楼层
System Verilog for Verification, 2nd Edition.pd
发表于 2014-10-10 23:23:44 | 显示全部楼层
ding!!!!!!!!!!!!!!!!!
发表于 2014-10-12 21:39:41 | 显示全部楼层
多谢多谢
发表于 2014-10-12 21:40:31 | 显示全部楼层
多谢多谢
发表于 2014-10-12 21:43:09 | 显示全部楼层
多谢多谢
发表于 2014-10-12 21:44:34 | 显示全部楼层
多谢多谢
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