在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 2145|回复: 4

Design of an FPGA-based computing platform for real-time three-dimensional

[复制链接]
发表于 2009-2-17 15:19:13 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
論文題目: Design of an FPGA-based computing platform for real-time three-dimensional medical imaging  論文編號: 3159447  論文作者: Li, Jianchun  學位名稱: Ph.D.  畢業學校: Case Western Reserve University (0042)  畢業年份: 2005  論文頁數: 99  指導教授: Papachristou, Christos  原始資料: DAI Vol 66-01, Section: B, page: 0451  主題分類: Engineering, Electronics and Electrical (0544);Engineering, Biomedical (0541)  論文摘要: Real-time 3D medical imaging requires very high computational capability that is beyond most of the general computing platforms. Although application specific integrated circuits (ASIC) can provide solutions for a particular algorithm, they are too expensive to develop and most of them are not flexible enough to adapt to the evolution of existing algorithms or the emergence of new problems. FPGA-based reconfigurable architectures combined with general-purpose processors exhibit a good tradeoff in performance and flexibility, and are affordable for practical applications. To address the problems in designing such a system, including long designing and testing time, complex data manipulation and high performance requirement etc., we designed a new computing platform to accelerate a broad range of local operation-based 3D medical imaging algorithms. This platform is composed of a new data caching scheme, called brick caching scheme and a reconfigurable System-on-Chip (SoC) architecture targeted to Xilinx Virtex-II Pro FPGAs. The brick caching scheme exploits spatial locality of reference in three dimensions with 3D block caching; it enables data prefetching by obtaining input data block information through input-output space mapping; it also supports multiple data accesses with data duplication. An intelligent data caching system is built around a PowerPC processor core in the SoC architecture to support the brick caching scheme. A multiple pipeline execution unit that is reconfigurable to different algorithms is designed to perform vectorized computation. Two algorithms are implemented and tested on this platform, one is the FDK cone-beam CT reconstruction algorithm and the other is the mutual information-based 3D registration algorithm. Our simulation results demonstrate that a speed-up of about 30 can be achieved for both of the algorithms.

[ 本帖最后由 tterry1234 于 2009-2-17 15:20 编辑 ]

abbr_3c869f42b167d3baddeef03ffdea0a52.rar

387.46 KB, 下载次数: 19 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2010-9-2 16:44:46 | 显示全部楼层
让土鳖看看。谢谢楼主
发表于 2010-9-3 13:04:35 | 显示全部楼层
谢谢分享
发表于 2020-2-19 01:50:01 | 显示全部楼层
谢谢楼主
发表于 2020-2-19 01:50:49 | 显示全部楼层
谢谢楼主
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-6 10:01 , Processed in 0.029770 second(s), 11 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表