Systematic Design for Optimisation of Pipelined ADCs

lotusky

Systematic Design for Optimisation of Pipelined ADCs (The Springer International Series in Engineering and Computer Science)
by João Goes, João C. Vital, José E. Franca

                               
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[size=120%]Systematic Design for Optimisation of Pipelined ADCs (The Springer International Series in Engineering and Computer Science)
By João Goes, João C. Vital, José E. Franca

• Publisher:   Springer
• Number Of Pages:   176
• Publication Date:   2001-02-28
• ISBN-10 / ASIN:   0792372913
• ISBN-13 / EAN:   9780792372912
• Binding:   Hardcover

Product Description:
Systematic Design for Optimisation of Pipelined ADCs proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters. The task is tackled by following a scientifically-consistent approach. First of all, the state of the art in pipeline A/D converters is analysed with a double purpose: a) to identify the best suited among different strategies reported in literature and taking into account the objectives pursued; b) to identify the drawbacks of these strategies as a basic first step to improve them. Then, the book proposes a top-down design approach for implementing high-performance low-power and low-area CMOS pipelined A/D converters through: The conception, development and implementation of self-calibrated techniques to extend the linearity of some critical stages in the architecture of pipelined ADCs. The detailed analysis and modelling of some major non-idealities that limit the physical realisation of pipelined ADCs and the proposal, development and implementation of design methodologies to support systematic design of optimised instances of these converters which combine maximum performance with minimum power dissipation and minimum area occupation. £/LIST£ Several implementations together with consistent measured results are presented. In particular, a practical realisation of a low-power 14-bit 5MS/s CMOS pipelined ADC with background analogue self-calibration is fully described.
The proposed approach is fully in line with the best practice regarding the design of mixed-signal integrated circuits. On the one hand, drawbacks of currently existing solutions are overcame through innovative strategies and, on the other hand, the expert knowledge is packaged and made available for re-usability by the community of circuit designers. Finally, feasibility of the strategies and the associated encapsulated knowledge is granted through experimental validation of working silicon.
Systematic Design for Optimisation of Pipelined ADCs serves as an excellent reference for analogue design engineers especially designers of low-power CMOS A/D converters. The book may also be used as a text for advanced reading on the subject.

[ 本帖最后由 lotusky 于 2008-11-16 09:21 编辑 ]

lotusky

Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits (The International Series in Engineering and Computer Science)
by James A. Cherry, W. Martin Snelgrove

                               
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[size=120%]Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits (The Springer International Series in Engineering and Computer Science)
By James A. Cherry, W. Martin Snelgrove

• Publisher:   Springer
• Number Of Pages:   280
• Publication Date:   1999-09-30
• ISBN-10 / ASIN:   0792386256
• ISBN-13 / EAN:   9780792386254
• Binding:   Hardcover

Product Description:
Among analog-to-digital converters, the delta-sigma modulator has cornered the market on high to very high resolution converters at moderate speeds, with typical applications such as digital audio and instrumentation. Interest has recently increased in delta-sigma circuits built with a continuous-time loop filter rather than the more common switched-capacitor approach. Continuous-time delta-sigma modulators offer less noisy virtual ground nodes at the input, inherent protection against signal aliasing, and the potential to use a physical rather than an electrical integrator in the first stage for novel applications like accelerometers and magnetic flux sensors. More significantly, they relax settling time restrictions so that modulator clock rates can be raised. This opens the possibility of wideband (1 MHz or more) converters, possibly for use in radio applications at an intermediate frequency so that one or more stages of mixing might be done in the digital domain.
Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits covers all aspects of continuous-time delta-sigma modulator design, with particular emphasis on design for high clock speeds. The authors explain the ideal design of such modulators in terms of the well-understood discrete-time modulator design problem and provide design examples in Matlab. They also cover commonly-encountered non-idealities in continuous-time modulators and how they degrade performance, plus a wealth of material on the main problems (feedback path delays, clock jitter, and quantizer metastability) in very high-speed designs and how to avoid them. They also give a concrete design procedure for a real high-speed circuit which illustrates the tradeoffs in the selection of key parameters. Detailed circuit diagrams, simulation results and test results for an integrated continuous-time 4 GHz band-pass modulator for A/D conversion of 1 GHz analog signals are also presented.
Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits concludes with some promising modulator architectures and a list of the challenges that remain in this exciting field.

[ 本帖最后由 lotusky 于 2008-11-16 09:30 编辑 ]

showidv

應該是依本很好看的書!!  可以參考一下唷!!

ulsi123

Qiao Qiao.

ehoward

谢谢！！

ehoward

ka看看！！

ehoward

谢谢！！

liuzhieetop

:victory:

fanjx

早有发过了

liugaba

绝对是依本很好看的書!!  可以參考一下唷!!