Design of Very High-Frequency Multirate Switched-Capacitor Circu

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Design of Very High-Frequency Multirate Switched-Capacitor Circuits: Extending the Boundaries of CMOS Analog Front-End Filtering (The Springer International Series in Engineering and Computer Science)
By U Seng-Pan, Rui Paulo Martins, José Epifânio da Franca

Publisher:   Springer
Number Of Pages:   227
Publication Date:   2005-12-20
ISBN-10 / ASIN:   0387261214
ISBN-13 / EAN:   9780387261218
Binding:   Hardcover



Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed:
-Optimum circuit architecture tradeoff analysis
-Simple speed and power trade-off analysis of active elements
-High-order filtering response accuracy with respect to capacitor-ratio mismatches
-Time-interleaved effect with respect to gain and offset mismatch
-Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding
-Stage noise analysis and allocation scheme
-Substrate and supply noise reduction
-Gain-and offset-compensation techniques
-High-bandwidth low-power amplifier design and layout
-Very low timing-skew multiphase generation
Two tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highest dynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS.


Summary: Difficult text in RF , but also difficult English to read
Rating: 3
The book contains a lot of reference to other books. And the price doesn't worth it. The RF subjects inside are somewhat difficult to understand, unless you are a very experience RF engineer. Added on top of that, the English sentences are too long, making it another level of difficulty to decipher the meaning of each phrase. I hope the author would make the text more easy to digest by chopping down the long sentences of English. The math models seem to be confusing too without much explanation. The book is too thin for this price.

liuzhieetop

Design of Very High-Frequency Multirate Switched-Capacitor Circuits

fanjx

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xiaoyingqun

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erdong2000cn

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