【Springer 2008】The Verilog® Hardware Description Language, 5th Edition

benemale

                               
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[size=120%]The Verilog® Hardware Description Language, Fifth Edition
By Donald Thomas, Philip Moorby

• Publisher:   Springer
• Number Of Pages:   386
• Publication Date:   2008-09-19
• ISBN-10 / ASIN:   0387849300
• ISBN-13 / EAN:   9780387849300
• Binding:   Hardcover

Product Description:

Thomas & Moorby’s The Verilog Hardware Description Language has become the standard reference text for Verilog.
This edition presents the new IEEE 1364-2001 standard of the language. The examples have all been updated to illustrate the new features of the language. A cross referenced guide to the new and old features is provided. Thus, designers already familiar with Verilog can quickly learn the new features. Newcomers to the language can use it as a guide for reading “old” specifications.
The Verilog Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design.
The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.



Summary: Excellent Book, Watch out for Chinese Version which Sucks!! Beware.
Rating: 2

I really liked the book since I had read a copy from my school library hence I decided to purchase one. Unfortunately since Amazon doesn't set any standards that all sellers should meet, my purchase was a rip off.

I order the book assuming it was a North American Copy Unfortunately The one that I received was printed in CHINA & FULL OF GRAMMATICAL MISTAKES please watch out for the seller "Express_Textbook" do not purchase unless u want a Chinese Version.

The seller does not specify this information so once you have made a transaction you'd have to go through the hassle of returning it.

A NOTE TO AMAZON ADMIN: PLEASE INSIST SELLERS WHEN SELLING NEW PRODUCTS TO SPECIFY DETAILS SO THAT CUSTOMERS CAN MAKE THE RIGHT CHOICE.


Summary: Very good
Rating: 4

'The Verilog Hardware Description Language' is a very good tutorial and reference for intermediate designers.
I used this book in an upper level hardware design course. The course had a beginning Verilog course as a prerequisite. I hadn't taken that course but I had experience in digital design and VHDL. This book got me up to speed quickly with it's many examples and tight explanations of the Verilog Language.
Some pluses:
-Example designs are short, complete, and simulatable. Most are even synthesizable. This is good because an example can be quickly understood in its entirety. You don't need to flip through and stare and multiple pages to get an idea of what's going on. If you insist on having them, there are two long, practical examples towards the end of the book.
-The text is very well written. Similar in style to 'The C Programming Language by Kernighan and Ritchie.'
-Verilog 2001: Focuses on 2001, which is a little clearer than previous standards. I think all tools support 2001 by default now so that should be used.

Some minuses:
-Too expensive.
-Not enough discussion on how Verilog constructs are compiled and netlisted. This is critically important in FPGA/ASIC design. However, this book is not any worse than other HDL books in this respect. It's just so important, I really haven't seen anything that gives the topic the treatment it deserves.

Possible minus:
-Not really for beginners. This is not a hardware design text.

I haven't used the CD that came with the book so I can't comment on that. My guess is anything on that CD is not as good as industry standard tools like Mentor's ModelSim.
Overall a very impressive book that will get you to productivity quickly in a Verilog project.


Summary: Could be great book, but shows too many deficiencies
Rating: 2

This book should be used only by the experienced users that can filter out problematic sections.
Major problems:
- first chapter, "recommended" by authors for university courses, is extremely chaotic (begin..end blocks are called loops, exercises ask you to use loops before introducing them, etc.)
- cover of the latest edition claims coverage of the latest Verilog standard - unfortunately it is very poor coverage: new interesting features such as libraries and configurations are not mentioned at all!
- I had to work hard during many trainings to correct bad coding styles showing in students reading this book as their first Verilog publication
- the book is grossly overpriced... Main advantage:
- good set of examples


Summary: Read This First Before Coding in Verilog
Rating: 5
The claim that this book has become the standard for learning Verilog is true.
I use Verilog a lot but I still wish I had read this book before writing Verilog codes.


Summary: Had to have my own copy
Rating: 4
Was sharing this book with my workmate. Found it pretty useful. I think its a great reference book to have.
It has
+ A great Index.
+ Good examples.
+ Been written by the masters of Verilog.
- A lot of words (ie some people might find it very 'wordy') Every ASIC/FPGA designer I know has this one in there shelf. So go for it.

[ 本帖最后由 benemale 于 2008-9-14 10:49 编辑 ]

natrac

:victory:

nieyang888

楼主发帖，必是精品

开发工具

必是精品

vertyang

楼主真是高手啊，这么快

vertyang

呵呵，太感谢啦

straw

good book,the latest

straw

although expensive,I buy it

Jason.tschen

benemale老哥
您的口袋到底有多少寶貝阿?
小弟真是佩服到六體投地......

lhyi

Thanks