大家都已被synopsys洗脑了

loveineda · 发表于 2008-8-20 13:04:12

原帖由 maxsnail 于 2008-8-15 12:31 发表

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tool bug 与我有什么关系，
你脑袋被踢了

楼主真TMD的,被猪踢蠢啦,难道SystemC,Systemverilog不是工具吗

evn · 发表于 2008-8-20 23:16:20

原帖由 loveineda 于 2008-8-20 13:04 发表

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楼主真TMD的,被猪踢蠢啦,难道SystemC,Systemverilog不是工具吗

Well... in my view, SystemC and Systemverilog are Languages, not Tools. Tools for example will be the editor for these languages.

evn · 发表于 2008-8-20 23:20:13

which one is better... 见仁见智 lor.

personally, i think SystemVerilog is bette, because it is a combination of systemC and Verilog, good for both design and verification.

loveineda · 发表于 2008-8-21 11:23:49

原帖由 evn 于 2008-8-20 23:16 发表

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Well... in my view, SystemC and Systemverilog are Languages, not Tools. Tools for example will be the editor for these languages.

假洋鬼子:语言是不是工具?????