Synthesis Strategies for Large ASICs

opteronfx

Table of Contents
1.0 Introduction.....................................................................................................................5
1.1 A Large ASIC Defined ..................................................................................................5
1.2 Design Details................................................................................................................6
1.3 Synthesis Issues .............................................................................................................6
1.4 Synthesis Strategy..........................................................................................................7
1.5 The Design Flow............................................................................................................7
1.5.1 Architecture ...............................................................................................................8
1.5.2 RTL Coding ...............................................................................................................8
1.5.3 Synthesis ....................................................................................................................9
1.5.4 Layout ........................................................................................................................9
1.6 Synthesis Strategy Summary .........................................................................................9
2.0 RTL Studies – Detail......................................................................................................10
RTL Algorithm Coding Example ........................................................................................10
2.1 Synthesis compile Options...........................................................................................11
2.2 Block Partitioning ........................................................................................................13
3.0 The Synthesis Process....................................................................................................15
3.1 Using Makefiles...........................................................................................................15
3.2 Using Revision Control ...............................................................................................16
3.3 Audit Scripts ................................................................................................................16
3.3.1 Design Guidelines....................................................................................................16
3.3.2 Gate Level Audits ....................................................................................................16
3.3.2.1 Example Script – Single Fanout ......................................................................17
3.3.3 Synthesis Script Audit Scripts .................................................................................18
3.3.4 Synthesis Report Audit Scripts ................................................................................19
3.3.4.1 Other Report Scripts ........................................................................................20
3.3.5 Release to Layout Scripts ........................................................................................21
4.0 Conclusions and Recommendations....................

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