FPGA无法从PROM中进行configure

yinchb · 发表于 2003-10-26 18:11:40

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FPGA：spartan2 2s30/tg144/-6/XST verilog
PROM：xc17s30apc
烧入.bit文件（用的是专门输入bit文件的软件），在烧录后已经set_reset_low
fpga的脉冲cclk一直存在，没有data输出，done为0，init为1，
证明没有从prom中读出配置信息。
是不是fpga和prom配置的不对？
是不是要进入bitgen进行对prom的配置？
应该怎样进入bitgen呢？
现在： bitgen report 如下，我没有改过（主要是不知道怎么改）
没有用到STARTUP block，
实际fpga的cclk为1.18MHz，好像与那个4MHz不符合吧？
Summary of Bitgen Options:
+----------------------+----------------------+
| Option Name       | Current Setting    |
+----------------------+----------------------+
| Compress          | (Not Specified)*    |
+----------------------+----------------------+
| Readback          | (Not Specified)*    |
+----------------------+----------------------+
| DebugBitstream    | No*                |
+----------------------+----------------------+
| ConfigRate          | 4**                |
+----------------------+----------------------+
| StartupClk          | Cclk**             |
+----------------------+----------------------+
| CclkPin             | Pullup**          |
+----------------------+----------------------+
| DonePin             | Pullup**          |
+----------------------+----------------------+
| M0Pin             | Pullup**          |
+----------------------+----------------------+
| M1Pin             | Pullup**          |
+----------------------+----------------------+
| M2Pin             | Pullup**          |
+----------------------+----------------------+
| ProgPin             | Pullup**          |
+----------------------+----------------------+
| TckPin             | Pullup**          |
+----------------------+----------------------+
| TdiPin             | Pullup**          |
+----------------------+----------------------+
| TdoPin             | Pullnone**          |
+----------------------+----------------------+
| TmsPin             | Pullup**          |
+----------------------+----------------------+
| UnusedPin          | Pulldown**          |
+----------------------+----------------------+
| GSR_cycle          | 6**                |
+----------------------+----------------------+
| GWE_cycle          | 6**                |
+----------------------+----------------------+
| GTS_cycle          | 5**                |
+----------------------+----------------------+
| LCK_cycle          | NoWait**          |
+----------------------+----------------------+
| DONE_cycle          | 4**                |
+----------------------+----------------------+
| Persist             | No*                |
+----------------------+----------------------+
| DriveDone          | No**                |
+----------------------+----------------------+
| DonePipe          | No**                |
+----------------------+----------------------+
| Security          | None**             |
+----------------------+----------------------+
| UserID             | 0xFFFFFFFF**       |
+----------------------+----------------------+
| Gclkdel0          | 11111**             |
+----------------------+----------------------+
| Gclkdel1          | 11111**             |
+----------------------+----------------------+
| Gclkdel2          | 11111**             |
+----------------------+----------------------+
| Gclkdel3          | 11111**             |
+----------------------+----------------------+
| ActiveReconfig    | No*                |
+----------------------+----------------------+
| ActivateGclk       | No*                |
+----------------------+----------------------+
| PartialMask0       | (Not Specified)*    |
+----------------------+----------------------+
| PartialMask1       | (Not Specified)*    |
+----------------------+----------------------+
| PartialGclk       | (Not Specified)*    |
+----------------------+----------------------+
| PartialLeft       | (Not Specified)*    |
+----------------------+----------------------+
| PartialRight       | (Not Specified)*    |
+----------------------+----------------------+
| IEEE1532          | No*                |
+----------------------+----------------------+
| Binary             | No**                |
+----------------------+----------------------+
*  Default setting.
** The specified setting matches the default setting.

bravelu · 发表于 2003-10-26 18:18:17

你能确定prom里面已经烧录了信息么？还有你的fpga的配置mode是什么？

yinchb · 发表于 2003-10-26 18:24:53

烧录进去了，用软件的read功能显示success，
Pin M0，M1，M2：在bitgen中设置为pull up。我在fpga外部接了0，
不知道是不是应该设为Pull down？

一声叹息 · 发表于 2003-10-26 19:31:17

PROM和FPGA的连接怎样？
PROM.DATA <--> FPGA.DIN
PROM.CCLK <--> FPGA.CCLK
PROM.CE <--> FPGA.DONE
PROM.OE/RESET <--> FPGA.INIT_B
其中DONE信号上拉，INIT_B信号上拉。
不要是你的这些信号中有短路的吧？呵呵。

bravelu · 发表于 2003-10-26 20:13:56

模式设置是主串行，没有什么问题。
有个地方需要注意一下，xc17s的OE/RESET脚是可设置有效电平的。而且默认情况下是高电平reset，这时候不能直接与init脚相接。（如你所测到的，init脚上是高，prom是reset状态）。所以你烧prom的时候一定要设置这个reset引脚为低有效，才能直接与init相连。不知道是不是这个问题，只是提醒一下。

yinchb · 发表于 2003-10-27 07:45:04

那3个模式引脚：M0，M1，M2是不是应当设为float，而不是pull up？好像在说明中有一项：Preconfiguration Pull-ups 中带主串模式时为NO。
另外，那些Done，Program，CCLK的引脚是不是用默认值Pull－up就可以了？

一声叹息 · 发表于 2003-10-27 08:40:43

（1）3个模式管脚在ISE中设为pull up应该没有问题；
根据XILINX的建议：
（2）DONE信号需要在PCB上用330欧姆电阻上拉；
（3）INIT信号需要在PCB上用4.7K欧姆电阻上拉；

yinchb · 发表于 2003-10-27 11:14:34

目前设置如下，仍旧不行。
PROM：XC17s30apc，烧录时选用xc17s30a的型号，
燒入的时.bin文件（因为软件上有文件格式为binary的选项）
设置set_RESET_low选项
INIT已经使用上拉电阻，
M0,M1,M2设为没有Pull-up
Done上没有用，所以姜DriveDONE设为Yes，及没有pull－up
仍旧只是fpga产生cclk，而数据无法读出，DONE不能置高。
设置BitGen如下：
Summary of Bitgen Options:
+----------------------+----------------------+
| Option Name       | Current Setting    |
+----------------------+----------------------+
| Compress          | (Not Specified)*    |
+----------------------+----------------------+
| Readback          | (Not Specified)*    |
+----------------------+----------------------+
| DebugBitstream    | No*                |
+----------------------+----------------------+
| ConfigRate          | 5                   |
+----------------------+----------------------+
| StartupClk          | Cclk**             |
+----------------------+----------------------+
| CclkPin             | Pullup**          |
+----------------------+----------------------+
| DonePin             | Pullup**          |
+----------------------+----------------------+
| M0Pin             | Pullnone          |
+----------------------+----------------------+
| M1Pin             | Pullnone          |
+----------------------+----------------------+
| M2Pin             | Pullnone          |
+----------------------+----------------------+
| ProgPin             | Pullup**          |
+----------------------+----------------------+
| TckPin             | Pullup**          |
+----------------------+----------------------+
| TdiPin             | Pullup**          |
+----------------------+----------------------+
| TdoPin             | Pullnone**          |
+----------------------+----------------------+
| TmsPin             | Pullup**          |
+----------------------+----------------------+
| UnusedPin          | Pulldown**          |
+----------------------+----------------------+
| GSR_cycle          | 6**                |
+----------------------+----------------------+
| GWE_cycle          | 6**                |
+----------------------+----------------------+
| GTS_cycle          | 5**                |
+----------------------+----------------------+
| LCK_cycle          | NoWait**          |
+----------------------+----------------------+
| DONE_cycle          | 4**                |
+----------------------+----------------------+
| Persist             | No*                |
+----------------------+----------------------+
| DriveDone          | Yes                |
+----------------------+----------------------+
| DonePipe          | No**                |
+----------------------+----------------------+
| Security          | Level1             |
+----------------------+----------------------+
| UserID             | 0xFFFFFFFF**       |
+----------------------+----------------------+
| Gclkdel0          | 11111**             |
+----------------------+----------------------+
| Gclkdel1          | 11111**             |
+----------------------+----------------------+
| Gclkdel2          | 11111**             |
+----------------------+----------------------+
| Gclkdel3          | 11111**             |
+----------------------+----------------------+
| ActiveReconfig    | No*                |
+----------------------+----------------------+
| ActivateGclk       | No*                |
+----------------------+----------------------+
| PartialMask0       | (Not Specified)*    |
+----------------------+----------------------+
| PartialMask1       | (Not Specified)*    |
+----------------------+----------------------+
| PartialGclk       | (Not Specified)*    |
+----------------------+----------------------+
| PartialLeft       | (Not Specified)*    |
+----------------------+----------------------+
| PartialRight       | (Not Specified)*    |
+----------------------+----------------------+
| IEEE1532          | No*                |
+----------------------+----------------------+
| Binary             | Yes                |
+----------------------+----------------------+