moselsim中进行post translate仿真时出现的error

yinchb

主要是那个GSR，GTS信号的事情，应该在自己的代码中加入：
reg GSR;
assign glbl.GSR = GSR;
initial begin
GSR = 1;
#100 GSR = 0;
end
并且：STARTUP_SPARTAN2 U1(.GSR(reset));
综合以及实现都是可以通过的，并且也compile了glbl.v,
可是为什么还会有这个错呢？
# Loading work.testbench
# Loading C:/Xilinx/Mypro/top_rom/work.top9
# Loading C:/Xilinx/Mypro/top_rom/work.X_LUT2
# Loading C:/Xilinx/Mypro/top_rom/work.X_CKBUF
# Loading C:/Xilinx/Mypro/top_rom/work.X_TRI
# Loading C:/Xilinx/Mypro/top_rom/work.X_INV
# Loading C:/Xilinx/Mypro/top_rom/work.X_PD
# ** Error: (vsim-3043) C:/Xilinx/Mypro/top_rom/top9_translate.v(113): Unresolved reference to 'glbl' in glbl.GSR.
#         Region: /testbench/UUT
# ** Error: (vsim-3043) C:/Xilinx/Mypro/top_rom/top9_translate.v(115): Unresolved reference to 'glbl' in glbl.GTS.
#         Region: /testbench/UUT
# Loading C:/Xilinx/Mypro/top_rom/work.x_lut2_mux4
# Loading C:/Xilinx/Mypro/top_rom/work.ffsrce
# Loading C:/Xilinx/Mypro/top_rom/work.x_lut4_mux4
# Loading C:/Xilinx/Mypro/top_rom/work.sffsrce
# Loading C:/Xilinx/Mypro/top_rom/work.x_lut3_mux4
# Loading C:/Xilinx/Mypro/top_rom/work.mux

jackzhang

在你的.f 文件中指明要打开的文件时可能忘记了glbl.v

一声叹息

能不能将你在modelsim中执行的命令贴出来？

yinchb

1、compile glbl.v以及mydesign_translate.v
2、simulate testbench（出错了）

# Reading C:/Modeltech_xe_starter/tcl/vsim/pref.tcl
vlog -reportprogress 300 -work work {C:/Xilinx/Mypro/top_rom/glbl.v}
# Model Technology ModelSim XE II vlog 5.7c Compiler 2003.03 Mar 15 2003
# -- Compiling module glbl
#
# Top level modules:
# glbl
vlog -reportprogress 300 -work work {C:/Xilinx/Mypro/top_rom/top9_translate.v}
# Model Technology ModelSim XE II vlog 5.7c Compiler 2003.03 Mar 15 2003
# -- Compiling module top9
# -- Scanning library directory 'C:/Xilinx/Mypro/top_rom/work'
# -- Scanning library file 'C:/Xilinx/verilog/src/unisims/LUT2.v'
# -- Scanning library directory 'C:/Xilinx/verilog/src/unisims'
# -- Scanning library file 'C:/Xilinx/Mypro/top_rom/glbl.v'
# -- Scanning library directory 'C:/Xilinx/verilog/src/simprims'
# -- Compiling module X_LUT2
# -- Compiling UDP x_lut2_mux4
# -- Compiling module X_FF
# -- Compiling UDP ffsrce
# -- Compiling module X_XOR2
# -- Compiling module X_LUT4
# -- Compiling UDP x_lut4_mux4
# -- Compiling module X_SFF
# -- Compiling UDP sffsrce
# -- Compiling module X_LUT3
# -- Compiling UDP x_lut3_mux4
# -- Compiling module X_BUF
# -- Compiling module X_ONE
# -- Compiling module X_MUX2
# -- Compiling UDP mux
# -- Compiling module X_ZERO
# -- Compiling module X_IPAD
# -- Compiling module X_OPAD
# -- Compiling module X_CKBUF
# -- Compiling module X_TRI
# -- Compiling module X_INV
# -- Compiling module X_PD
# -- Scanning library directory 'C:/Xilinx/verilog/src'
# -- Scanning library directory 'C:/Xilinx/spartan2/data'
# -- Scanning library directory 'C:/Xilinx/Mypro/top_rom/work/testbench'
# -- Scanning library directory 'C:/Xilinx/verilog/src/iSE/abel'
# -- Scanning library directory 'C:/Xilinx/verilog/src/simprims'
# -- Scanning library directory 'C:/Xilinx/verilog/src/uni9000'
# -- Scanning library directory 'C:/Xilinx/verilog/src/unisims'
#
# Top level modules:
# top9
vsim work.testbench
# vsim work.testbench
# Loading work.testbench
# Loading work.top9
# Loading work.X_LUT2
# Loading work.X_FF
# Loading work.X_XOR2
# Loading work.X_LUT4
# Loading work.X_SFF
# Loading work.X_LUT3
# Loading work.X_BUF
# Loading work.X_ONE
# Loading work.X_MUX2
# Loading work.X_ZERO
# Loading work.X_IPAD
# Loading work.X_OPAD
# Loading work.X_CKBUF
# Loading work.X_TRI
# Loading work.X_INV
# Loading work.X_PD
# ** Error: (vsim-3043) C:/Xilinx/Mypro/top_rom/top9_translate.v(113): Unresolved reference to 'glbl' in glbl.GSR.
#         Region: /testbench/UUT
# ** Error: (vsim-3043) C:/Xilinx/Mypro/top_rom/top9_translate.v(115): Unresolved reference to 'glbl' in glbl.GTS.
#         Region: /testbench/UUT
# Loading work.x_lut2_mux4
# Loading work.ffsrce
# Loading work.x_lut4_mux4
# Loading work.sffsrce
# Loading work.x_lut3_mux4
# Loading work.mux
# Error loading design
结束

bravelu

glbl.v 不但要compile，还要load。

一声叹息

bravelu说的对。
# top9
vsim work.testbench
# vsim work.testbench
应该是vsim testbench glbl

yinchb

没有load那个菜单呀？
在哪里？

jackzhang

说的对是这样的

yinchb

出来了！！！抽根烟庆祝一下。
谢谢大家，激动的说不出话了。。。。

jackzhang

下面引用由yinchb在 2003/10/24 05:47pm 发表的内容：
出来了！！！抽根烟庆祝一下。
谢谢大家，激动的说不出话了。。。。

别勾引我，刚戒了！！！