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发表于 2008-11-27 09:12:08
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It depends on the purposes.
For switch-cap delta-sigma ADC, usually a PIP-cap is used. MIM is also fine but costs a large die size.
MOS-cap is not suitable since its cap value highly depends on the terminal bias conditions.
However, if it is used for on-chip decoupling for surpressing EMI or power line noise, MOS-cap is a great candidate since its unit capacitance is the greatest.
Please be aware that there exist some tricks for layout of decoupling cap in general P-sub process.
If you guys are reviewing the variation characteristics of cap, I would say MOS cap "MIGHT" have the smallest variation since gate oxide is usually developed with dry oxidation process (very very slow...), which has better process control-ability. Inter-layer dielectric (ILD) such as P-P, P-M, or M-M are usually developed with CVD. In order to achieve lower thermal budget and less demand for thickness accuracy, these layers are usually not focused on precise control of thickness. (It does NOT mean CVD cannot be controlled accurately!!!) Well, this remark may differ from process to process. Just share some point of view.
[ 本帖最后由 waliley78751 于 2008-11-27 13:00 编辑 ] |
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