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IEEE Journals of Solid-State Circuits 2008, Volume 43 Issue 4(Apr)

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发表于 2008-4-1 22:03:37 | 显示全部楼层 |阅读模式

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IEEE Journals of Solid-State Circuits 2008, Volume 43  Issue 4(Apr)

Table of contents
IEEE Journal of Solid-State Circuits publication information
Table of contents2


Introduction to the Special Issue on the 2007 Symposium on VLSI Circuits
Digital Circuit Design Trends
Memory at VLSI Circuits Symposium
A 9 b, 1.25 ps Resolution Coarse–Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue
A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 um CMOS
A 0.5-V 8-bit 10-Ms/s Pipelined ADC in 90-nm CMOS
A 77-dB Dynamic Range, 7.5-MHz Hybrid Continuous-Time/Discrete-Time Cascaded Sigma-Delta Modulator
A 12-Bit, 10-MHz Bandwidth, Continuous-Time $SigmaDelta$ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer
Ultra Fast Fixed-Frequency Hysteretic Buck Converter With Maximum Charging Current Control and Adaptive Delay Compensation for DVS Applications
A 200-muV/e^- CMOS Image Sensor With 100-ke^- Full Well Capacity
A Design Method and Developments of a Low-Power and High-Resolution Multiphase Generation System
A High-Efficiency DC–DC Converter Using 2 nH Integrated Inductors
A Highly Digital MDLL-Based Clock Multiplier That Leverages a Self-Scrambling Time-to-Digital Converter to Achieve Subpicosecond Jitter Performance
Resonant-Clock Latch-Based Design
Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits
Exploring Variability and Performance in a Sub-200-mV Processor
Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors
Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding
A Zeroing Cell-to-Cell Interference Page Architecture With Temporary LSB Storing and Parallel MSB Program Scheme for MLC NAND Flash Memories
A 70 nm 16 Gb 16-Level-Cell NAND flash Memory
A 45 nm 2-port 8T-SRAM Using Hierarchical Replica Bitline Technique With Immunity From Simultaneous R/W Access Issues
A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing
An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches
1-cc Computer: Cross-Layer Integration With UWB-IR Communication and Locationing
A High Data-Rate Energy-Efficient Interference-Tolerant Fully Integrated CMOS Frequency Channelized UWB Transceiver for Impulse Radio
A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna
A Low Power V-Band CMOS Frequency Divider With Wide Locking Range and Accurate Quadrature Output Phases
A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter
A Scalable 5–15 Gbps, 14–75 mW Low-Power I/O Transceiver in 65 nm CMOS
A Bidirectional- and Multi-Drop-Transmission-Line Interconnect for Multipoint-to-Multipoint On-Chip Communications
A 60-GHz CMOS Receiver Front-End With Frequency Synthesizer
A 0.016 mm^2 , 2.4 GHz RF Signal Quality Measurement Macro for RF Test and Diagnosis

IEEE/ACM 2008 Interational Conference on Computer Aided Design
2008 IEEE Compound Semiconductor IC Symposium
IEEE Journal of Solid-State Circuits information for authors

[ 本帖最后由 eBookMania 于 2008-4-1 22:38 编辑 ]

JSSC 2008 Issue 4(Apr).part01.rar

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 楼主| 发表于 2008-4-1 22:41:29 | 显示全部楼层
quick quick come a pipiw
发表于 2008-4-2 09:26:50 | 显示全部楼层
hehe, thanks eBookMania  a lot!
发表于 2008-4-2 11:30:53 | 显示全部楼层
Two paper has problem

the paper missing
"A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations
Ikenaga, Y.; Nomura, M.; Nakazawa, Y.; Hagihara, Y.
Page(s): 911-918"

and the paper corrupted
"A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna"

please check and reupload, thanks a lot!
 楼主| 发表于 2008-4-2 12:45:54 | 显示全部楼层


原帖由 pipiw 于 2008-4-2 11:30 发表
Two paper has problem

the paper missing
"A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations
Ikenaga, Y.; Nomura, M.; Nakazawa, Y.; Hagihara, Y.
Page(s): 911-918"

and the paper corrupted
"A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna"

please check and reupload, thanks a lot!



oops! I forgot the first one

will be uploaded soon.

the 2nd one is corrupted originally. see the attached.

A Circuit for Determining the Optimal Supply Voltage.rar

1.11 MB, 下载次数: 35 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2008-4-2 14:21:46 | 显示全部楼层
ok, I see, thanks a lot!
发表于 2008-4-2 23:41:17 | 显示全部楼层
谢谢,辛苦了!
发表于 2008-4-3 02:57:24 | 显示全部楼层
真是太快了,才發完,就店了!!!
发表于 2008-4-3 09:46:57 | 显示全部楼层
谢谢楼主,好东东一定要支持。
发表于 2008-4-3 19:05:41 | 显示全部楼层
Good thing! thanks!  
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