Information: Level shifter LVLUO_BUFV4_90S9T16L from library scc12nsfe_90sdb_9tc16_lvlhlo_lvt_ffgs_v0p88_v0p77_0c_ccs cannot be inserted to net u_gala/Trig because of main power mismatch(require power pin VDD to be connected to domain primary power VDD_gala), missing levshi strategy(consider adding levshi strategy to pin u_gala/U_Mirror/Trig). (MV-753)