猎头-Sr. ASIC Design Engineer 北京 上海

bestgrace

Sr. ASIC Design Engineer

Position Description:  

The candidate will be the part of the design team for the development of  

next  

generation of video codec IP, the responsibilities include:  

oMicro-architecture definition;  

oLogic implementation with Verilog-HDL;  

oBlock-level verification;  

oSynthesis and pre-layout/post-layout timing closure;  

oPower analysis and reduction;  

oFPGA prototyping and debugging;  



Qualification:  

oBS with 5+ years or MS with 2+ years experiences in electronic  

engineering/mi  
cro-electronics;  

oExpect elf-motivation and team player;  

oSolid skills and rich experiences in logic design, synthesis and timing  

analy  
sis;  

oHands-on engineering experiences in video codec development, familiar with  

vi  
deo coding standard such like H.264/AVC, MPEG-4, AVS etc.;  

oFamiliar with all front-end flows including LINT check, simulation,  

synthesis  
, STA, formal and power analysis, etc.;  

oKnowledge and experiences in Computer Architecture and RISC processor  

(ARM/MI  
PS/SPARC) micro-architecture would be a great plus;  

oFamiliar with AXI4/AXI3 protocol, memory controller would be a plus;  

oExperience in FPGA prototyping and debugging would be a plush;



E-Mail: bestgrace@qq.com

QQ: 2043753191

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http://blog.sina.com.cn/u/1767088102

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http://weibo.com/bestgrace