[猎头] Intermediate Layout Engineer/ASIC Support /Digital Design

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Job Description – Intermediate Layout Engineer

Job description:

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Layout floor planning, physical layout, routing, and verification including DRC, LVS, and LPE.

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Layout techniques to improve circuit performance.

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Work with design to define optimal layout solutions, based on design objectives.

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Position will be based in Shanghai, China.

Minimum Requirements:

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BS degree or equivalent experience.

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Experience in analog IC layout.

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Experience in Cadence IC Layout tool set.

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2+ years of semiconductor layout experience.

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Team-based, cross-functional organizational structure experience preferred.

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Excellent interpersonal, verbal, and written communication.

Behavioral Qualifications:

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Strong communications skills; written, verbal, presentation and listening

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Good interpersonal skills to work in a team environment

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Good command of written and spoken English required

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Excellent organizational skills.

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International travel to USA may be needed.

Job Title: ASIC Support Engineer

General Summary

The ASIC Support Engineer will be responsible for the general support of multiple ASIC and FPGA designs. Ideal candidate will work closely with a small team of support engineers, performing design debug, Verilog RTL simulations, test environment maintenance, and periodic test development. Ideal candidate will be able to learn multiple existing designs down to the functional level and be able to provide root-cause analysis of real-life failures.

Principal Duties and Responsibilities

In a team environment, learn the design and verification environment of multiple ASIC/FPGA chips

Provide failure analysis support in response to field and manufacturing failures

Utilize existing test suites to drive debug efforts

Create new verification tests as necessary to augment existing verification test suites in response to failures observed

Work directly with field support, manufacturing personnel, and design engineers around the globe

Communicate status and root-cause to the technical team lead

Skills

Working knowledge of either the Verilog HDL or VHDL languages.

Demonstrated knowledge of C/C++

Familiar with the Cadence NC-Verilog simulator and a graphical waveform viewer.

Excellent communication, technical skills

Strong sense of urgency and teamwork

Ability to work well both alone or in a small cross-functional team

Education Required: Bachelor of Science in Electrical or Computer Engineering

Experience Required: 3 years of semi-custom or FPGA chip design and/or chip verification experience

Digital Design Engineer

Key Responsibilities:

•Preparation and review of functional and design specification for ASIC (ASIC/FPGA)

•Prove logical functionality and ASIC/FPGA code design/implementation.

•Coding of digital functionality form top-level down to block level

•verification and simulation of needed functionality on block level

•Make test plan and test strategy. Ensure effective testing and high quality product delivery.

•Participate in system requirement and architecture review.

•Generating the test bench environment for the verification

•Responsible for test planning, test case definition.

Job Requirements:

SoC development & Methodology

•2+ years of digital (ASIC/FPGA) design experience

•Very good Verilog knowhow and coding and modeling experience

•Complete understanding of the digital (ASIC/FPGA) design flow and process.

•Knowledge of Signal Processing, familiar with Matlab

System

One to Two skills as mentioned below is required:

•Solid background in Digital Signal Processing/Mix signal design

•Good knowledge on Audio/Code

•Good knowledge on IIR/FIR Filter design

•Good knowledge on sample rate convert (interpolation/decimation)

Experience

•2+ years experience in digital/mix signal design.

Education/Skills

•Bachelor/Master of Science (Electrical Engineering)

•Innovative thinking and team working spirit.

•Be initiative, capable to analyze and learn

•High team and result orientation are required.

•Know how to share knowledge with other colleagues.

•Fluent speaking and writing skills in English

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Best Regards,

Grace Li

Principal Consultant & General Manager @ Hi-Talent Consulting Co. , Ltd.

上海芯相会企业管理咨询有限公司

E-Mail: bestgrace@qq.com

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