max_transition check in PT

henry_wangjj

Morning, all.

I'm now confused with the max_transition check in PT, could anyone help me?

in my opinion, normally, PT checks max_transition for both input and output & bidirectional pins of the library cells when doing signoff STA, and now I have a question:

Suppose a PAD cell is driven by a buffer, and there's max_transition attribute 5 for the output pin of the buffer in the library, and no max_transition attribute for the input pin of the PAD ( only a default 3, and this is not for input pins, right?), why PT checks the max_transition for both the input_pin of the PAD and the output pin of the buffer?? the actual output_transition of the buffer is 4.7, which is small than the max_transition of the output pin of the buffer. However, PT issues a violation, since 4.7 is bigger than the max_transition of the input pin of the PAD, and PT uses the default 3 as the max_transition attribute for the input pin of the PAD?

could anyone plz explain this for me, thanks in advance!

regards,
henry

loglong

I suggest you post the timing report. and everything is clear.

The set_max_transition command sets a maximum limit on
transition time for the nets attached to specified ports, for a whole
design, or for pins within a specified clock domain. and default transition definitely affect the input.

It's definetely a violation if the actual transition > max_transition, right?

henry_wangjj

回复 2# loglong

thanks,

and suppose this,

    --A(buffer)Y----IN(PAD)OUT

if the actaul transition on the output pin "Y" of the buffer is 4.7, which is smaller than the max_transition 5 in the library.

however, 4.7, which servers as the input transition of the input pin "IN" of the PAD cell, which causes a violations since it's bigger than 3, which is the vaule PT uses from the default max_transition of the PAD library.

and I have two question:

1. is this a double constraint?
2.is the default max_transition only for the output? and why PT use it for the input pin "IN" of the PAD here?

and anyway , I have fixed this violation by manually adding buffers. but I still couldn't figure out the above two problems

thanks in advance.
regards,
henry

loglong

Do you understand what's the transition time of a port? or Net? You can consider it as the required time for value change (0-1, 1-0).

The output transition of Y is 4.7, and Y is connected to IN of PAD, then this transition time is applied to IN of PAD, then violate the checker of default trainsition time in PAD.

You can use "report_constraint -max_transition command" for your constraint for more information.

It's good to hear you've fixed this issue.

henry_wangjj

回复 4# loglong


    thanks for replying.

I am still confused with the way PT checks max_transition on the two problems I posted above.

In this way, I thinks it's a double constraints.

and besides, the default max_transition is only for OUTPUT pin of cells, which is written in the User Guide of PT, thus why PT use it here for the PAD cells?????

hua2011sz

gao duan tie~