请大家说说ADPLL的设计难点在什么地方

jsls0701 · 发表于 2011-7-4 15:08:24

TDC和环路带宽控制

daojianxiaohyf · 发表于 2012-3-6 20:21:38

正在学习中。。。。。

appleblue · 发表于 2012-3-12 10:56:52

系统级：如何快速准确的建模，DCO的模型比较准确了，但是不同种类的TDC噪声模型还不成熟；
电路级：提高TDC的精度、降低DCO的相位噪声。

个人觉得，ADPLL和PLL系统级具有统一的环路特性，只是ADPLL的噪声主要由TDC和DCO贡献。

kaka_gy · 发表于 2012-3-14 05:09:00

感觉TDC的精度和线性度确实是个瓶颈啊

shadowsun · 发表于 2012-4-11 15:33:50

DTC and DCO

lxu · 发表于 2012-9-2 02:38:59

The challenge with DCO design is mainly with the fine tuning bank. There are several conflicting requirements. It needs to provide a high frequency resolution to minimize frequency quantization errors. This can make it difficult to cover enough frequency range to cope with issues such as temperature drift and supply push. Also, linearity would also be an issue with the small devices as required for high frequency resolution.

fhy420462303 · 发表于 2017-10-9 12:07:54

回复 13# appleblue

可否请教您一下关于DLF控制DCO，一直没有搞清楚！我的DLF出来是24bits，但是模拟那边说DCO是6+7+7的结构，就是粗6+中7+细7！
现在不知道过去怎么控制,烦请指点一二

请大家说说ADPLL的设计难点在什么地方

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