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本帖最后由 Tnavy 于 2011-12-13 13:32 编辑
VHDL实用教程 【PDF高清】
注:只下载最上面一个附件即可!
推荐初学VHDL的朋友下载,讲得比较详细的教程,总14章,电子科技大学出版
VHDL .pdf
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压缩版
目录
目 录
第1章 绪 论....................................................................................................................1
§ 1.1 关于EDA...............................................................................................................1
§ 1.2 关于VHDL............................................................................................................3
§ 1.3 关于自顶向下的系统设计方法............................................................................5
§ 1.4 关于应用VHDL的EDA过程.............................................................................6
§ 1.5 关于在系统编程技术............................................................................................9
§ 1.6 关于FPGA/CPLD 的优势...................................................................................10
§ 1.7 关于VHDL的学习.............................................................................................10
第2章 VHDL入门..............................................................................................................12
§ 2.1 用VHDL设计多路选择器和锁存器.................................................................12
§ 2.2 用VHDL设计全加器.........................................................................................15
第3章 VHDL程序结构......................................................................................................19
§ 3.1 实 体 ENTITY ..............................................................................................19
§ 3.2 结构体 ARCHITECTURE ............................................................................26
§ 3.3 块语句结构 BLOCK .....................................................................................29
§ 3.4 进程 PROCESS .............................................................................................32
§ 3.5 子程序(SUBPROGRAM) ....................................................................................35
3.5.1 函数 FUNCTION ..................................................................................36
3.5.2 重载函数 OVERLOADED FUNCTION ..............................................39
3.5.3 过程 PROCEDURE ...............................................................................42
3.5.4 重载过程 OVERLOADED PROCEDURE ..........................................44
§ 3.6 库 LIBRARY .................................................................................................45
§ 3.7 程序包 PACKAGE ........................................................................................48
§ 3.8 配置 CONFIGURATION ..............................................................................51
习题............................................................................................................................ 53
第4章 VHDL语言要素......................................................................................................55
§ 4.1 VHDL文字规则..................................................................................................55
§ 4.2 VHDL数据对象..................................................................................................58
4.2.1 变量(VARIABLE) ........................................................................................59
4.2.2 信号(SIGNAL) .............................................................................................60
4.2.3 常数(CONSTANT).......................................................................................63
§ 4.3 VHDL数据类型..................................................................................................64
4.3.1 VHDL的预定义数据类型..........................................................................65
4.3.2 IEEE预定义标准逻辑位与矢量.................................................................68
4.3.3 其它预定义标准数据类型..........................................................................70
4.3.4 用户自定义数据类型方式..........................................................................71
4.3.5 枚举类型......................................................................................................73
4.3.6 整数类型和实数类型..................................................................................74
4.3.7 数组类型......................................................................................................74
4.3.8 记录类型......................................................................................................76
4.3.9 数据类型转换..............................................................................................78
§ 4.4 VHDL操作符......................................................................................................82
4.4.1 操作符种类..................................................................................................82
4.4.2 逻辑操作符..................................................................................................83
4.4.3 关系操作符..................................................................................................85
4.4.4 算术操作符..................................................................................................87
4.4.5 重载操作符..................................................................................................93
习题...............................................................................................................................94
第5章 VHDL顺序语句......................................................................................................95
§ 5.1 赋值语句..............................................................................................................95
5.1.1 信号和变量赋值..........................................................................................96
5.1.2 赋值目标......................................................................................................97
§ 5.2 流程控制语句......................................................................................................99
5.2.1 IF语句..........................................................................................................99
5.2.2 CASE 语句.................................................................................................102
5.2.3 LOOP语句.................................................................................................106
5.2.4 NEXT语句.................................................................................................109
5.2.5 EXIT语句..................................................................................................110
§ 5.3 WAIT语句.........................................................................................................111
§ 5.4 子程序调用语句................................................................................................115
§ 5.5 返回语句(RETURN)..........................................................................................118
§ 5.6 空操作语句(NULL) ...........................................................................................119
§ 5.7 其它语句和说明................................................................................................120
5.7.1 属性(ATTRIBUTE) 描述与定义语句......................................................120
5.7.2 文本文件操作(TEXTIO) ...........................................................................125
5.7.3 ASSERT 语句.............................................................................................127
5.7.4 REPORT 语句............................................................................................128
5.7.5 决断函数....................................................................................................128
习题...............................................................................................................................129
第6章 VHDL并行语句....................................................................................................131
§ 6.1 进程语句............................................................................................................132
§ 6.2 块 语 句............................................................................................................137
§ 6.3 并行信号赋值语句............................................................................................138
6.3.1 简单信号赋值语句....................................................................................138
6.3.2 条件信号赋值语句....................................................................................138
6.3.3 选择信号赋值语句....................................................................................139
§ 6.4 并行过程调用语句............................................................................................141
§ 6.5 元件例化语句....................................................................................................143
§ 6.6 类属映射语句....................................................................................................145
§ 6.7 生成语句............................................................................................................146
习题.............................................................................................................................151
第7章 VHDL的描述风格................................................................................................153
§ 7.1 行为描述............................................................................................................153
§ 7.2 数据流描述........................................................................................................155
§ 7.3 结构描述............................................................................................................156
习题.............................................................................................................................157
第8章 仿 真................................................................................................................158
§ 8.1 VHDL仿真........................................................................................................158
§ 8.2 延时模型............................................................................................................162
8.2.1 固有延时....................................................................................................163
8.2.2 传输延时....................................................................................................163
§ 8.3 仿 真 d ..............................................................................................................164
§ 8.4 仿真激励信号的产生........................................................................................164
§ 8.5 VHDL测试基准................................................................................................166
§ 8.6 VHDL系统级仿真............................................................................................169
习题.............................................................................................................................170
第9章 综 合................................................................................................................171
§ 9.1 VHDL综合........................................................................................................171
§ 9.2 有关可综合性的考虑........................................................................................174
§ 9.3 寄存器引入方法................................................................................................175
9.3.1 容易发生的错误........................................................................................175
9.3.2 常规寄存器的引入....................................................................................180
9.3.3 具有时钟门控结构寄存器的引入............................................................183
9.3.4 同步置位 复位功能的引入....................................................................184
9.3.5 异步置位 复位功能的引入....................................................................184
§ 9.4 引入寄存器的有关技巧....................................................................................186
§ 9.5 三态门引入方法................................................................................................190
§ 9.6 资源共享............................................................................................................194
习题.............................................................................................................................196
第10章 有限状态机FSM.................................................................................................198
§ 10.1 一般状态机设计..............................................................................................199
§ 10.2 状态机的状态编码..........................................................................................210
§ 10.3 状态机剩余状态处理......................................................................................212
习题.............................................................................................................................213
第11章 数字滤波器设计..................................................................................................215
§ 11.1 基于FPGA的数字滤波器优势.....................................................................215
§ 11.2 FIR数字滤波器设计......................................................................................217
11.2.1 FIR滤波器结构原理简要.......................................................................217
11.2.2 FIR滤波器设计方案确定.......................................................................220
11.2.3 FIR滤波器主系统设计...........................................................................223
11.2.4 FIR滤波器附加功能实现.......................................................................227
§ 11.3 IIR数字滤波器设计.......................................................................................229
11.3.1 IIR滤波器设计方案................................................................................229
11.3.2 IIR滤波器的实现....................................................................................232
习题.............................................................................................................................234
第12章 VHDL设计平台使用向导..................................................................................235
§ 12.1 ispVHDL使用向导..........................................................................................235
12.1.1 ispLSI系列介绍.......................................................................................236
12.1.2 ispVHDL设计套件介绍..........................................................................236
12.1.3 ispVHDL设计向导..................................................................................237
§ 12.2 Altera MAX+plus II VHDL使用向导............................................................246
§ 12.3 MAX+plus II与Synplify接口........................................................................254
§ 12.4 Xilinx Foundation VHDL使用向导................................................................256
12.4.1 Foundation设计流程...............................................................................256
12.4.2 VHDL输入方式设计向导......................................................................257
习题...............................................................................................................................264
第13章 VHDL设计实践与实验......................................................................................265
§ 13.1 8位预置加法计数器设计...............................................................................265
实验习题...................................................................................................................267
§ 13.2 宽位可预置中断处理器...............................................................................267
实验习题...................................................................................................................268
§ 13.3 静态随机存储器 SRAM ..........................................................................269
实验习题...................................................................................................................270
§ 13.4 堆栈设计..........................................................................................................270
实验习题...................................................................................................................271
§ 13.5 8位硬件加法器设计.......................................................................................271
实验习题...................................................................................................................273
§ 13.6 8位硬件乘法器设计.......................................................................................273
实验习题...................................................................................................................278
§ 13.7 乒乓球游戏电路设计......................................................................................278
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