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Vhdl is defined by IEEE Standard 1076, IEEE Standard VHDL Language Reference Manual
(the VHDL LRM). The original standard was approved in 1987. IEEE procedures
require that standards be periodically reviewed and either reaffirmed or revised. The
VHDL standard was revised in 1993, 2000, and 2002. In each revision, new language features
were added and some existing features enhanced. The aim in each revision was to
improve the language as a tool for design and verification of digital systems.
Since the 2002 revision, there have two parallel efforts to further develop the language.
The first was the VHDL Procedural Interface (VHPI) Task Force, a subcommittee
of the IEEE P1076 Working Group. The VHPI Task Force prepared an interim amendment
to the standard, formally approved by IEEE in March 2007. The amendment is titled
IEEE 1076c, Standard VHDL Language Reference Manual—Amendment 1: Procedural
Language Application Interface.
In the second effort, during 2004 and 2005, the P1076 Working Group undertook
preliminary work toward a new revision of the standard. In June 2005, the board of
Accellera approved formation of a Technical Committee (TC) to continue that work,
funded jointly by Accellera and TC members directly. The Accellera VHDL-TC worked
intensively between September 2005 and June 2006, producing a new draft of the LRM,
P1076/D3.0. This draft was a full revision of the VHDL standard, defining numerous new
and enhanced language features, incorporating minor clarifications and corrections, and
including the VHPI specification from IEEE 1076c. The language defined by this draft is
informally called VHDL-2006. The draft was published for trial use by implementers and
users during the period from June 2006 to June 2007. Feedback has been rolled into a
subsequent draft to be forward to the P1076 Working Group for IEEE standardization.
The final version will be informally called VHDL-2008.
The aim of this book is to introduce the new and changed features of VHDL-2008 in
a way that is more accessible to users than the formal definition in the LRM. We describe
the features, illustrate them with examples, and show how they improve the language as
a tool for design and verification. We assume you are already familiar with earlier versions
of VHDL, specifically VHDL-2002 and VHDL-93. These versions are described comprehensively
in The Designer’s Guide to VHDL, Second Edition, by Peter Ashenden, also
published by Morgan Kaufmann Publishers. We hope that the present book will be helpful
not only to early adopters of the new language version, but also to tool implementers
seeking to understand what it is they have to implement. |
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发表于 2009-4-12 20:06:54
