CORDIC 算法

user123random · 发表于 2017-5-14 00:37:23

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我现在写着一个CORDIC 的 verilog 代码，但在逻辑上遇到问题。 https://www.edaplayground.com/x/3tHk ，为何 y[2] == 0 ?

cordic.zip (1.01 KB, 下载次数: 4 ) --> verilog 代码

Cordic_octave.zip (482 Bytes, 下载次数: 4 ) --> octave/matlab 代码

module cordic(z0, xn, yn);
input [21:0] z0;
output [16:0] xn, yn;
parameter N= 10; // number of iterations
reg [(N-1):0] d;
reg [16:0] x [(N-1):0];
reg [16:0] y [(N-1):0];
reg [21:0] z [(N-1):0];
reg [21:0] arctan [(N-1):0];
initial begin
x[0] = 'b10011011011101001; // 0.60725 in binary
y[0] = 0;
arctan[0] = 45.0;
arctan[1] = 26.6;
arctan[2] = 14.0;
arctan[3] = 7.1;
arctan[4] = 3.6;
arctan[5] = 1.8;
arctan[6] = 0.9;
arctan[7] = 0.4;
arctan[8] = 0.2;
arctan[9] = 0.1;
end
integer i;
always @(*)
begin z[0] = z0;
for(i=0; i<N; i=i+1)
begin
d[i] = (z[i][16] == 0) ? 0 : 1;
if(d[i] == 0) begin
x[i+1] = x[i] - y[i] >> i;
y[i+1] = y[i] + x[i] >> i;
z[i+1] = z[i] - arctan[i];
end
else begin
x[i+1] = x[i] + y[i] >> i;
y[i+1] = y[i] - x[i] >> i;
z[i+1] = z[i] + arctan[i];
end
$display("i=%2d, x[i]=%b, y[i]=%b, z[i]=%b, d[i]=%2d, arctan[i]=%b", i,x[i],y[i],z[i],d[i],arctan[i]);
end
end
assign xn = x[N-1]; // xn = cos(z0)
assign yn = y[N-1]; // yn = sin(z0)
endmodule

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`timescale 1ns/100ps
module cordic_tb;
reg[21:0] z0;
wire[16:0] xn, yn;
cordic C1
(
.z0(z0), .xn(xn), .yn(yn)
);
initial begin
$dumpfile("cordic.vcd");
$dumpvars(0, cordic_tb);
#10 z0 = 30;
end
endmodule

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i= 0, x=10011011011101001, y=00000000000000000, z=0000000000000000011110, d= 0, arctan=0000000000000000101101
i= 1, x=10011011011101001, y=10011011011101001, z=1111111111111111110001, d= 1, arctan=0000000000000000011011
i= 2, x=00011011011101001, y=00000000000000000, z=0000000000000000001100, d= 0, arctan=0000000000000000001110
i= 3, x=00000110110111010, y=00000110110111010, z=1111111111111111111110, d= 1, arctan=0000000000000000000111
i= 4, x=00000001101101110, y=00000000000000000, z=0000000000000000000101, d= 0, arctan=0000000000000000000100
i= 5, x=00000000000110110, y=00000000000110110, z=0000000000000000000001, d= 0, arctan=0000000000000000000010
i= 6, x=00000000000000000, y=00000000000000011, z=1111111111111111111111, d= 1, arctan=0000000000000000000001
i= 7, x=00000000000000000, y=00000000000000000, z=0000000000000000000000, d= 0, arctan=0000000000000000000000
i= 8, x=00000000000000000, y=00000000000000000, z=0000000000000000000000, d= 0, arctan=0000000000000000000000
i= 9, x=00000000000000000, y=00000000000000000, z=0000000000000000000000, d= 0, arctan=0000000000000000000000
Done

andyme · 发表于 2017-5-15 00:17:10

本帖最后由 andyme 于 2017-5-15 00:18 编辑

这是纯simulation 用途的代码？atan表没有定点化？

user123random · 发表于 2017-5-15 17:00:39

回复 2# andyme

上面纯组合逻辑电路的代码已经完成了。关于arctan 定点化，我会做的。放心。

今天，我还做了流水线的相对的代码。但是在初始化 parameterized 模块时遇到问题。 https://www.edaplayground.com/x/4ymA

为何 error: identifier `arctan` is not a parameter in cordic_pipelined_tb.C1.$gen1[0]. ？？

`timescale 1ns/100ps
module cordic_pipelined(clk, z0, xn, yn);
input clk;
input [9:0] z0;
output [16:0] xn, yn;
parameter N=10;
wire [16:0] x [(N-1):0];
wire [16:0] y [(N-1):0];
wire [ 9:0] z [(N-1):0];
reg [ 9:0] arctan [(N-1):0];
initial begin
x[0] = 'b10011011011101001; // 0.60725 in binary
y[0] = 0; z[0] = z0;
arctan[0] = 'b101101_0000; // 45.0;
arctan[1] = 'b011010_1001; // 26.6;
arctan[2] = 'b001110_0000; // 14.0;
arctan[3] = 'b000111_0001; // 7.1;
arctan[4] = 'b000011_1001; // 3.6;
arctan[5] = 'b000001_1100; // 1.8;
arctan[6] = 'b000000_1110; // 0.9;
arctan[7] = 'b000000_0110; // 0.4;
arctan[8] = 'b000000_0011; // 0.2;
arctan[9] = 'b000000_0001; // 0.1;
end
genvar i;
generate
for(i=0; i<N; i=i+1)
begin
cordic_stage #(.atan(arctan[i]), .i(i)) stage_i
(
.clk(clk),
.x_i(x[i]), .x_o(x[i+1]),
.y_i(y[i]), .y_o(y[i+1]),
.z_i(z[i]), .z_o(z[i+1])
);
end
endgenerate
assign xn = x[N-1]; // xn = cos(z0)
assign yn = y[N-1]; // yn = sin(z0)
endmodule

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`timescale 1ns/100ps
module cordic_stage(clk, x_i, y_i, z_i, x_o, y_o, z_o);
parameter atan=0, i=0;
input clk;
input [16:0] x_i, y_i;
input [9:0] z_i;
output [16:0] x_o, y_o;
output [9:0] z_o;
reg d;
reg [16:0] x_o, x_next;
reg [16:0] y_o, y_next;
reg [9:0] z_o, z_next;
always @ (posedge clk)
begin
x <= x_next;
y <= y_next;
z <= z_next;
end
always @(*)
begin
d = (z_i[9] == 0) ? 0 : 1;
if(d == 0) begin
x_next = x_i - (y_i >>> i);
y_next = y_i + (x_i >>> i);
z_next = z_i - arctan;
end
else begin
x_next = x_i + (y_i >>> i);
y_next = y_i - (x_i >>> i);
z_next = z_i + arctan;
end
$display("i=%2d, x_i=%b, y_i=%b, z_i=%b, z_next=%b, d=%2d, arctan[i]=%b", i,x_i,y_i,z_i,z_next,d,arctan);
end
endmodule

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`timescale 1ns/100ps
module cordic_pipelined_tb;
reg clk;
reg[9:0] z0;
wire[16:0] xn, yn;
cordic_pipelined C1
(
.clk(clk), .z0(z0), .xn(xn), .yn(yn)
);
initial begin
$dumpfile("cordic_pipelined.vcd");
$dumpvars(0, cordic_pipelined_tb);
clk = 0;
z0 = 45;
#120 $finish;
end
always #5 clk = !clk;
endmodule

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加油99 · 发表于 2017-5-16 19:17:12

本帖最后由加油99 于 2017-5-16 21:50 编辑

cordic_stage例化问题。链接中那样处理就很好。

user123random · 发表于 2017-5-17 00:39:41

我已经实现了三个版本的cordic算法：

组合：https://www.edaplayground.com/x/449A
时钟：https://www.edaplayground.com/x/4MQN
流水线：https://www.edaplayground.com/x/4ymA

综合以前，我试图解决一些未知状态（z = xxxxxxxxxxx）。一旦成功合成和硬件测试，我将在这直接上传所有三个版本的源代码。

为什么 https://www.diffchecker.com/9YTcSxXK 右边的代码会有未知状态（z = xxxxxxxxxxx），而左边的不会呢？

user123random · 发表于 2017-5-17 11:52:40

我把 initial block 改成 parameter 来初始化， iverilog 有 syntax error, vcs 却没有？

https://www.edaplayground.com/x/449A
第15行： error: syntax error in parameter list.

  parameter [10:0] arctan [9:0] =
  {
11'b000_0000_0001, 11'b000_0000_0011, 11'b000_0000_0110, 11'b000_0000_1110, 11'b000_0001_1100,
11'b000_0011_1001, 11'b000_0111_0001, 11'b000_1110_0000, 11'b001_1010_1001, 11'b010_1101_0000
  };

user123random · 发表于 2017-5-18 20:24:54

解决了。发现纯verilog 没能处理这个，systemverilog 反而可以。

以下的代码能称得上是 multi-cycle 的形式吗？

module cordic_clocked(clk, rst, z0, xn, yn);
input clk, rst;
input [10:0] z0;
output [16:0] xn, yn;
parameter N= 10; // number of iterations
reg [(N-1):0] d;
reg [16:0] x [N:0];
reg [16:0] y [N:0];
reg [10:0] z [N:0];
wire [10:0] arctan [(N-1):0];
assign arctan[0] = 'b010_1101_0000; // 45.0;
assign arctan[1] = 'b001_1010_1001; // 26.6;
assign arctan[2] = 'b000_1110_0000; // 14.0;
assign arctan[3] = 'b000_0111_0001; // 7.1;
assign arctan[4] = 'b000_0011_1001; // 3.6;
assign arctan[5] = 'b000_0001_1100; // 1.8;
assign arctan[6] = 'b000_0000_1110; // 0.9;
assign arctan[7] = 'b000_0000_0110; // 0.4;
assign arctan[8] = 'b000_0000_0011; // 0.2;
assign arctan[9] = 'b000_0000_0001; // 0.1;
reg [3:0] i;
always @(posedge clk)
begin
if(rst) begin
x[0] <= 'b0_10011_0110_1110_1001; // 0.60725 in binary
y[0] <= 0;
z[0] <= z0;
i <= 0;
end
else begin
d[i] = (z[i][10] == 0) ? 0 : 1;
if(d[i] == 0) begin
x[i+1] <= x[i] - (y[i] >> i);
y[i+1] <= y[i] + (x[i] >> i);
z[i+1] <= z[i] - arctan[i];
end
else begin
x[i+1] <= x[i] + (y[i] >> i);
y[i+1] <= y[i] - (x[i] >> i);
z[i+1] <= z[i] + arctan[i];
end
i <= i + 1;
end
$display("rst=%1b, i=%2d, x[i]=%b, y[i]=%b, z[i]=%b, d[i]=%2d, arctan[i]=%b",rst, i,x[i],y[i],z[i],d[i],arctan[i]);
end
assign xn = x[N]; // xn = cos(z0)
assign yn = y[N]; // yn = sin(z0)
endmodule

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