【Synopsys武汉】热招 Verification Engineer, Staff（Technical leader）

synopsys_hire · 发表于 2016-5-19 15:13:10

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本帖最后由 synopsys_hire 于 2016-5-19 17:48 编辑

Hi All,

Synopsys武汉研发中心招数字设计/验证工程师，具体职位描述如下，欢迎有意向的朋友发送简历到qyzhong@synopsys.com

Position: Verification Engineer, Staff（Technical leader）Location: Wuhan, China

Job Description:

This position will be a verificationtechnical leader role to develop verification project for Synopsys leading edgeinterface IP. Verification development tasks include verification plandevelopment, test bench generation inUVM/SystemVerilog/C++, test cases developmentand debug, test environment infra andregression infra development.

This tech leader position will have tocoordinate with various engineering teams across Synopsys to drive IPdevelopment and successful release with high quality; CombinePHY IP development verification process and improve team’s verificationtechnical capabilities; and execute on ASIC verification flow to meet projectrelease quality and schedule requirement.

Requirements:

·MSEE required and 10+ years of verification working experience.

·Hands on experience with creating test plan and test environment from functionalspecifications and test environment specifications with verificationmethodology of UVM/VMM.

·Has leadership skills and takes verification ownership on projects.

·Has good analysis and problem-solving skills.

·Has ability to improve work flow and quality.

·Has both of good verbal and written communication skills to work with globalteams.

·Interface IP development experience is a big plus.

synopsys_hire · 发表于 2016-5-23 09:48:26

update

synopsys_hire · 发表于 2016-5-25 10:53:31

update

mangotango · 发表于 2016-5-26 13:05:57

How much ?

synopsys_hire · 发表于 2016-5-26 14:42:13

回复 4# mangotango

If you are interested in our position, please send your CV to qyzhong@synopsys.com, our recruiters are willing to have a brief talk with you about the position