著名外企英特尔招聘DFV、DFT相关人才

Annaguo

著名外企英特尔招聘DFV、DFT相关人才

工作地点：西安  上海  杭州

联系人：郭小姐

联系电话：0571-28829923

邮箱：guoah@hundsun.com

1、Experienced Digital design and Functional Verification engineer     

Job Description:

Interface to Hardware Architects (Concept Engineering) and Physical Implementation Team

Assisting clock, reset and power concept definition together with Concept Engineering

Defining design implementation specification (module or sub-system level)

VHDL or Verilog Coding

Internal and/or external IP integration

Test-bench generation and test-case preparation according to verification plan

Gate-level simulation

Test pattern generation (interface to IC Test Development Engineer) and debug support

Timing constraint definition/review (interface to Physical Implementation Team)

STA timing analysis support (interface to Physical Implementation Team)

Requirements:

3+ years experience

Familiar with mainstream simulators (Modelsim and/or Affirma)

Scripting/programming languages (PERL and/or TCL and/or C, etc)

Knowledge on Design Compiler

Understanding of timing analysis and physical implementation
     Understanding of DFT (Design for Test) concept

Fluent in spoken and written English (CET6 is desired)

      

2、Experienced Design For Test engineer      

Job Description:

Implement Design for Test strategy into the chip and responsible for DFT sign off. Participate in driving new DFT methodology and solutions to improve quality, reliability and in system test and debug capability.

Working out DFT concept, aligning with designer.

Implement basic DFT schemes in terms of BIST, scan, boundary scan on chip.

Generate tests which achieve highest possible component test coverage with lowest overhead.

Verify all DFT logics and test patterns with simulation and static timing analysis tool.

Implement and verify advanced DFT logics like logic BIST, high speed interface test logic etc.

Requirements:

3+ years experience
     Good knowledge in Design for Test in general. Understand the concepts of BIST, SCAN, JTAG, ATPG.

Experience in DFT design, Testability, and Reliability issues.

Hands on familiarity with various DFT analysis, and verification tools.

Hands on knowledge of simulation and verification debug tools.

Good knowledge of test engineering in terms of test program generation, 
understanding of testers and associated hardware is a plus.

Working knowledge using Verilog HDL languages and tools, scripting and programming languages (Perl, TCL, C and C++).
      Excellent written and verbal communications, team and people skills.

wyxgah

GOOD CHANCE

wyxgah

waiting for it

myimage

可惜我是做后端的

fayfay521

没有单纯的DV么。。。。

Annaguo

   

没有单纯的DV么。。。。
fayfay521 发表于 2011-6-8 14:11

                               
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    你指验证吗？

fayfay521

   

你指验证吗？
Annaguo 发表于 2011-6-10 11:16

                               
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    是的。

woodkey

DFV、DFT是啥子？

fayfay521

design for verification
design for test.
吧？呵呵。

Annaguo

   

是的。
fayfay521 发表于 2011-6-10 14:02

                               
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    你好，验证的话你可以考虑DFV这个职位，主要涉及前端设计和验证。