在线咨询 切换到宽版
eetop公众号 创芯大讲堂 创芯人才网

 找回密码
 注册

手机号码,快捷登录

手机号码,快捷登录

搜帖子
查看: 12274|回复: 46

223页的详细论文-A 10bit 100 MS/s AD Converter in 1µm CMOS(UCLA)

[复制链接]
发表于 2006-11-28 09:01:16 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

×
A 10-bit, 100 MS/s Analog-to-Digital Converter in 1-µm CMOS

ABSTRACT OF THE DISSERTATION

A 10-bit 100 Msample-per-Second
Analog-to-Digital Converter
in 1-mm CMOS
by
Kwang Young Kim
Doctor of Philosophy in Electrical Engineering
University of California, Los Angeles, 1996
Professor Asad A. Abidi, Chair

Applications such as high-end video signal processing, high performance
digital communications, and medical imaging require ADCs with sample rates
approaching 100 MS/s and a dynamic range at the Nyquist bandwidth close to 60
dB. In response to these needs, there is a continued search for architectures and
circuit techniques enabling a monolithic ADC to meet these specifications with a
reasonable chip area and power dissipation. It is of particular interest that if such an
ADC is fabricated in a standard CMOS technology.

This work addresses some of the known problems inherent in timeinterleaved,
or parallel, pipeline ADCs with a new architecture. A prototype of this
architecture demonstrates, for the first time, 10-bit operation at the maximum
sampling rate up to 95 MHz in 1 mm CMOS technology. It attains 59.5 dB SNDR
at a low conversion rate, and more than 50 dB SNDR at 50MHz input frequency
with a 95 MHz conversion rate. By using a minor offset control to suppress the fs/2
tone, 65 dB spurious free dynamic range (SFDR) is achieved. The simulated bit
error rate is less than 10-10. The ADC implemented in fully differential circuitry
uses the 2-channel 3-stage pipeline architecture. Each stage converts 4-bits, and
2-bits from 12-bit are used for digital error correction. Because all the digital clock
signals are generated from the on-chip clock buffer, it requires a single full speed
clock signal. The active chip area is 50 mm2 and the ADC dissipates 1.2 W from a
single 5 V power supply.

A 10 bit 100M AD(223P) .pdf

1.45 MB, 下载次数: 368 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2006-11-28 19:56:29 | 显示全部楼层
谢谢楼主,共同学习!
回复 支持 反对

使用道具 举报

发表于 2006-11-28 21:39:41 | 显示全部楼层
http://www.icsl.ucla.edu/aagroup/splibr.html

这些东西直接到大学实验室下载就行
回复 支持 反对

使用道具 举报

发表于 2006-11-28 22:05:47 | 显示全部楼层
谢谢,楼上的
回复 支持 反对

使用道具 举报

发表于 2006-11-28 23:27:16 | 显示全部楼层
好东西谢谢了先
回复 支持 反对

使用道具 举报

发表于 2006-11-28 23:52:09 | 显示全部楼层
好文档,谢谢了
回复 支持 反对

使用道具 举报

发表于 2006-11-29 14:07:30 | 显示全部楼层
好東西 謝啦
回复 支持 反对

使用道具 举报

发表于 2006-12-25 18:56:08 | 显示全部楼层
回复 支持 反对

使用道具 举报

发表于 2006-12-25 18:56:55 | 显示全部楼层
回复 支持 反对

使用道具 举报

发表于 2006-12-25 19:50:27 | 显示全部楼层

回复 #1 semico_ljj 的帖子

good sthff. thanks.
回复 支持 反对

使用道具 举报

您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

X

手机版| 小黑屋| 关于我们| 联系我们| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2025-9-14 02:13 , Processed in 0.023017 second(s), 6 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表