Springer Analog circuits and signal processing serials (总共36本, 搜集了30本)

handchief581

感谢benemale版主，目前凑成整数30本

在本坛神人benemale 的帖子里面有提到这个系列,并且也贴了几本这个系列的书出来,可以到http://www.eetop.cn/bbs/thread-92416-1-1.html去看看,关于这一系列的书,Springer的官方网站是这么描述的:

The Analog Circuits and Signal Processing book series, formerly known as the Kluwer International Series in Engineering and Computer Science, is a high level academic and professional series publishing research on the design and applications of analog integrated circuits and signal processing circuits and systems. Typically per year we publish between 5-15 research monographs, professional books, handbooks, edited volumes and textbooks with worldwide distribution to engineers, researchers, educators, and libraries.

The book series promotes and expedites the dissemination of new research results and tutorial views in the analog field. There is an exciting and large volume of research activity in the field worldwide. Researchers are striving to bridge the gap between classical analog work and recent advances in very large scale integration (VLSI) technologies with improved analog capabilities. Analog VLSI has been recognized as a major technology for future information processing. Analog work is showing signs of dramatic changes with emphasis on interdisciplinary research efforts combining device/circuit/technology issues. Consequently, new design concepts, strategies and design tools are being unveiled.

Topics of interest include:
Analog Interface Circuits and Systems;
Data converters;
Active-RC, switched-capacitor and continuous-time integrated filters;
Mixed analog/digital VLSI;
Simulation and modeling, mixed-mode simulation;
Analog nonlinear and computational circuits and signal processing;
Analog Artificial Neural Networks/Artificial Intelligence;
Current-mode Signal Processing; Computer-Aided Design (CAD) tools;
Analog Design in emerging technologies (Scalable CMOS, BiCMOS, GaAs, heterojunction and floating gate technologies, etc.);
Analog Design for Test;
Integrated sensors and actuators; Analog Design Automation/Knowledge-based Systems; Analog VLSI cell libraries; Analog product development;
Low voltage/low power analog IC design;
RF Front ends, Wireless communications and Microwave Circuits;
Analog behavioral modeling, Analog HDL.

全部36本书,红色的代表已经有了的,黑色的还需要大虾们一起搜集一下了.

1V CMOS Gm-C Filters · Design and Applications

Adaptive Low-Power Circuits for Wireless Communications

Adaptive Multi-Standard RF Front-Ends

Advanced Design Techniques for RF Power Amplifiers

Analog Circuit Design Techniques at 0.5V

Analog-Baseband Architectures and Circuits for Multistandard a...

Analysis and Design of Quadrature Oscillators

Baseband Analog Circuits for Software Defined Radio

Biopotential Readout Circuits for Portable Acquisition Systems

Broadband Opto-Electrical Receivers in Standard CMOS

Circuit and Interconnect Design for RF and High Bit-rate Appli...

CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom

CMOS Current-Mode Circuits for Data Communications

CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Opti...

CMOS Single Chip Fast Frequency Hopping Synthesizers for Wireless Multi-Gigahertz Applications

Design of High Voltage xDSL Line Drivers in Standard CMOS

Full-Chip Nanometer Routing Techniques

High-Level Modeling and Synthesis of Analog Integrated Systems

High-Resolution IF-to-Baseband SigmaDelta ADC for Car Radios

Inductive Powering · Basic Theory and Application to Bi...

IQ Calibration Techniques for CMOS Radio Transceivers

Low Power UWB CMOS Radar Sensors

Low-Frequency Noise in Advanced MOS Devices

Low-Power High-Speed ADCs for Nanometer CMOS Integration

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters

Omnidirectional Inductive Powering for Biomedical Implants

Precision Temperature Sensors in CMOS Technology

RF Power Amplifiers for Mobile Communications

Silicon-Based RF Front-Ends for Ultra Wideband Radios

Structured Analog CMOS Design

Substrate Noise Coupling in RFICs

Switched-Capacitor Techniques for High-Accuracy Filter and ADC...

The gm/ID Design Methodology for CMOS Analog Low Power Integra...

Ultra Low Power Capacitive Sensor Interfaces

Ultra Low-Power Biomedical Signal Processing,An Analog Wavelet Filter Approach for Pacemakers

UWB Pulse-based Radio

[ 本帖最后由 handchief581 于 2009-4-28 13:17 编辑 ]

handchief581

一本本来

1V CMOS Gm-C Filters · Design and Applications 现在论坛上已经有了，请到： http://www.eetop.cn/bbs/thread-164410-1-1.html 下载                                 登录/注册后可看大图                                 登录/注册后可看大图                                 登录/注册后可看大图 1V CMOS Gm-C FiltersDesign and Applications Series: Analog Circuits and Signal Processing Lo, Tien-Yu, Hung, Chung-Chih 2009, Approx. 175 p., Hardcover ISBN: 978-90-481-2409-1 Due: 六月 2009 About this book 1V CMOS Gm-C Filters: Design and Applications discusses the design aspects of transconductor and Gm-C filter circuits, with a special focus on 1V circuit implementations. The emphasis is on high linearity voltage-to-current blocks for wireless and wireline applications, and the designs cover up to very high speed specifications. 1V CMOS Gm-C Filters: Design and Applications starts with a general introduction to the concepts of transconductors. The overview of the general architectures is provided, ranging from shunt feedback to floating gate topologies. A variety of transconductors based on nano-scale technologies are discussed with special attentions to the short channel effect. The performances are optimized while taking speed, linearity and power consumption into consideration. The implementation of the Gm-C filter is introduced following the transconductors. The filter synthesis and non-ideal effects caused by active devices are analyzed. Three Gm-C filters are implemented for channel selection in wireless receivers, and all of these filters operate under multiple modes to save chip area. The target applications are IEEE 802.11a/b/g Wireless LANs, Wideband CDMA, cdma2000, and Bluetooth. Moreover, the high speed filter required for pulse signal interface is also discussed. Several high speed filters are implemented with systematic design procedures. The design and discussion of automatic tuning systems are included as well. 1V CMOS Gm-C Filters: Design and Applications provides a clear introduction of low voltage architectures and yields insight into the influence of circuit non-idealities. The fully CMOS implementation could be useful for wireless and wireline applications. The basic design concepts can be easily constructed through the illustration of this book. This book can be provided for engineers and researchers who are interested in the transconductor and Gm-C filter. It is also a good reference for the course related to analog integrated circuit design. Written for: Graduate students, professors, researchers, engineers working on the wireline or wireless IC design Table of contents Preface. List of Tables. List of Figures. 1. MOTIVATION. 1.1. Introduction. 1.2. Applications. 1.3. Organization. 2. TRANSCONDUCTOR. 2.1. Introduction. 2.2. Review of CMOS Transconductor. 2.3. The 40MHz Double Differential-Pair CMOS Transconductor with -60dB IM3. 2.4. A 50MHz Pseudo-Differential Transconductor with Mobility Reduction Compensation. 2.5. Linear CMOS Transconductor in Nano-Scale CMOS Technology. 3. GM-C FILTER. 3.1. Introduction. 3.2. The Implementation of The GM-C Filter. 3.3. A Wide Tuning Range GM-C Continuous-Time Analog Filter. 4. MULTI-MODE CHANNEL SELECTION FILTER FOR WIRELESS APPLICATIONS. 4.1. Introduction. 4.2. Zero-IF Receiver. 4.3. A GM-C Continuous-Time Analog Filter for Multi-Mode Wireless Applications. 4.4. Multi-Mode GM-C Channel Selection Filter for Mobile Applications. 4.5. A Wide Tuning Range GM-C Filter for Multi-Mode Direct-Conversion Wireless Receivers. 5. HIGH SPEED FILTRE WITH AUTOMATIC TUNING CIRCUIT. 5.1. Introduction. 5.2. Linear Phase Filter. 5.3. Automatic Tuning Circuit. 5.4. A 1 GHz Equiripple Low-Pass Filter with A High-Speed Automatic Tuning Scheme. 5.5. A GM-C Low-Pass Filter for UWB Wireless Application. 6. CONCLUSIONS. References. About the Authors.

[ 本帖最后由 handchief581 于 2009-4-28 13:12 编辑 ]

handchief581

第二本来了,其实这个论坛上已经有了,不过我还是在这边贴上,为了整个工作的连续性.
[table=382][tr][td=1,1,382]Adaptive Low-Power Circuits for Wireless Communications



[table][tr][td=1,2]

                               
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[/td][td]Adaptive Low-Power Circuits for Wireless CommunicationsSeries: Analog Circuits and Signal Processing
Tasic, Aleksandar, Serdijn, Wouter A., Long, John R.

2006, XV, 221 p., Hardcover
ISBN: 978-1-4020-5249-1


Ships within 2-3 weeks.
[/td][/tr][tr][td]89,95

handchief581

第三本来了
Adaptive Multi-Standard RF Front-Ends

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Adaptive Multi-Standard RF Front-EndsSeries: Analog Circuits and Signal Processing Vidojkovic, V., Tang, J. van der, Leeuwenburgh, A., van Roermund, A. 2008, XVIII, 194 p., Hardcover ISBN: 978-1-4020-6533-0 Online version available

About this book
The design and use of multi-standard RF transceivers is the way to increase hardware flexibility and functionality, as well as to improve the flexibility of set-makers on the market. In the design of multi-standard RF transceivers the efforts will be directed towards improvement of hardware reusability, reconfigurability, programmability and flexibility. This will result in the launching of a software-defined radio.
Since the radio environment is variable, the application of adaptivity in RF transceivers results in the reduction of their power consumption. Eventually, it is reasonable to believe that RF front-ends will be smart in the sense that they will be able to monitor the radio environment and to adapt themselves to the changes in this environment paving the way for a cognitive radio.
Adaptive Multi-Standard RF Front-Ends investigates solutions, benefits, limitations and costs related to multi-standard operation of RF front-ends and their adaptivity to variable radio environments. Next, it highlights the optimization of RF front-ends that allow achieving of maximal performance with a certain power budget while targeting full integration. Also, it investigates possibilities for low-voltage low-power circuit topologies in CMOS technology.
The concepts and considerations presented in this book have been validated through the design and implementation of the reconfigurable multi-band DECT/Bluetooth RF front-end in 0.18 um CMOS technology.
The successful design and implementation of the reconfigurable DECT/Bluetooth RF front-end is the result of systematic approach through all the steps in the design flow of a multi-standard front-end starting with the system level design, continuing with the circuit level design and implementation, and ending with the validation based on measurements.

Written for:
Graduate level students, researchers and professionals in the area of analog circuit design, RF and wireless communications, designers of electronic integrated circuits for radio frequencies, PhD students in the field of electronic integrated circuits

Table of contents
Glossary. Abbreviations.
1 Introduction.  1.1 The state-of-the-art in multi-standard RF transceivers. 1.2 Scope. 1.3 Outline.
2 Front-end architecture selection. 2.1 A generic front-end architecture. 2.2 A set of front-end architectures. 2.3 Selection criteria. 2.4 Selection of a suitable front-end architecture. 2.5 Summary.
3 Broad-band polyphase filters. 3.1 Passive polyphase filter topology. 3.2 RC polyphase filters and their applications. 3.3 Design considerations. 3.4 Summary.
4 Analysis of low-IF architectures.  4.1 Noise and voltage gain analysis in a low-IF front-end. 4.2 Linearity analysis. 4.3 Image rejection analysis. 4.4 Summary.
5 RF and building block specifications. 5.1 RF specifications. 5.2 Distribution of building block specifications. 5.3 Summary.
6 A low-voltage folded switching mixer. 6.1 Transconductors for folded switching mixers. 6.2 AC-coupled folded switching mixer with current-reuse. 6.3 Simulation and experimental results. 6.4 Mixer benchmarking. 6.5 Summary.
7 Multi-band reconfigurable complex mixer. 7.1 1.9 - 2.4 GHz reconfigurable complex mixer. 7.2 1.9 - 2.4 GHz conventional complex mixer. 7.3 Summary.
8 Reconfigurable multi-band LNA. 8.1 Design considerations. 8.2 Design procedure. 8.3 Design example. 8.4 A reconfigurable multi-band DECT/Bluetooth LNA. 8.5 Summary.
9 Reconfigurable multi-band RF front-end.
10 Conclusions.
A RF, system and bulding block specifications.
B Noise factor of a two-port network.
C Noise factor of a passive RF block.
References.

handchief581

第四本
Advanced Design Techniques for RF Power Amplifiers

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Adaptive Low-Power Circuits for Wireless CommunicationsSeries: Analog Circuits and Signal Processing Tasic, Aleksandar, Serdijn, Wouter A., Long, John R. 2006, XV, 221 p., Hardcover ISBN: 978-1-4020-5249-1

About this book
Well over a billion people are currently using cellular telephones, and this number is expected to grow to over two billion in the next few years. It is remarkable that a device that was considered a high-technology "toy" just a few years ago is now an indispensable feature of modern life. One of the key reasons for this remarkable transformation is the integration of all the radio functions of a cellular telephone onto a single inexpensive piece of silicon. This achievement is a result of innovations in design and process technology that allowed formerly discrete and separate devices to be integrated onto a common substrate.
Now that this integration has been accomplished, the next challenge is to make these radio functions adaptive to their environment. This "adaptive" feature of wireless communications devices is just today becoming a reality, and Adaptive Low-Power Circuits for Wireless Communications represents one of the first comprehensive treatments of the subject.
Adaptive radio transceivers require a comprehensive theoretical framework in order to optimize their performance. Adaptive Low-Power Circuits for Wireless Communications provides this framework with a discussion of joint optimization of Noise Figure and Input Intercept Point in receiver systems. Original techniques to optimize voltage controlled oscillators and low-noise amplifiers to minimize their power consumption while maintaining adequate system performance are also provided. The experimental results presented at the end of the book confirm the utility of the proposed techniques.

Written for:
RF Circuit designers, RF System designers, Electrical Engineering students, RF Circuit and System researchers

handchief581

第五本
Analog Circuit Design Techniques at 0.5V
2007年的书,哪位可以提供

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Analog Circuit Design Techniques at 0.5VSeries: Analog Circuits and Signal Processing Chatterjee, S., Pun, K.P., Stanic, N., Tsividis, Y., Kinget, P. 2007, XII, 158 p. 118 illus., Hardcover ISBN: 978-0-387-69953-0

About this book
Analog design at ultra-low supply voltages is an important challenge for the semiconductor research community and industry.

Analog Circuit Design Techniques at 0.5V covers challenges for the design of MOS analog and RF circuits at a 0.5V power supply voltage. All design techniques presented are true low voltage techniques - all nodes in the circuits are within the power supply rails. The circuit implementations of body and gate input fully differential amplifiers are also discussed. These building blocks enable us to build continuous-time filters, track-and-hold circuits, and continuous-time sigma delta modulators.
Current books on low voltage analog design typically cover techniques for supply voltages down to approximately 1V. This book presents novel ideas and results for operation from much lower supply voltages and the techniques presented are basic circuit techniques that are widely applicable beyond the scope of the presented examples.
Analog Circuit Design Techniques at 0.5V is written for analog circuit designers and researchers as well as graduate students studying semiconductors and integrated circuit design.

Written for:
Graduate students studying semiconductors and integrated circuit design; researchers in academia and industry in low voltage analog design

handchief581

第六本
Analog-Baseband Architectures And Circuits For Multistandard And Low voltage Wireless Transceivers

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Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless TransceiversSeries: Analog Circuits and Signal Processing Mak, Pui-In, U, Seng-Pan, Martins, Rui Paulo 2007, XXI, 178 p., Hardcover ISBN: 978-1-4020-6432-6

About this book
With the past few decade efforts on lithography and integrated-circuit (IC) technologies, very low-cost microsystems have been successfully developed for many different applications. The trend in wireless communications is toward creating a networkubiquitous era in the years to come. Many unprecedented opportunities and challenges, such as Design for multi-standardability and low-voltage (LV) compliance, are rapidly becoming the mainstream directions in wireless-IC research and development, given that the former can offer the best connectivity among different networks, while the latter can facilitate the technology migration into the sub-1-V nanoscale regimes for further cost and power reduction.
Analog-Baseband Architecturees and Circuits presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. The first part of the book reviews the physical layer specifications of modern wireless communication standards, presents the fundamental tradeoffs involved in transceiver architecture selection, and provides case studies of the state-of-the-art multistandard transceivers, where the key techniques reinforced are highlighted and discussed. A statistical summary (with 100+ references cited) of most used transmitter and receiver architectures for modern communication standards is provided. All the references are citied from the leading forums, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.
The second part focuses on the architectural design of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection technique is disclosed. It, through the reconfiguration of receiver and transmitter analog basebands, enables not only a relaxation of the RF frequency synthesizer’s and local oscillator’s design specifications, but also an efficient multistandard compliance by synthesizing the low-IF and zero-IF in the receiver; and the direct-up and two-step-up in the transmitter. The principle is demonstrated in few design examples. One of them is a system-in-a-package (SiP) receiver analog  baseband for IEEE 802.11a/b/g WLAN. It not only has the two-step channel selection embedded, but also features a flexible-IF topology, a unique 3D-stack floorplan, and a particular design methodology for high testability and routability.
The third part deals with the circuit design. In addition to the methodical description of many LV circuit techniques, 3 tailormade LV-robust functional blocks are presented. They include: 1) a double-quadrature-downconversion filter (DQDF) – it realizes concurrently clock-rate-defined IF reception, I/Q demodulation, IF channel selection and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it offers a transient-free constant-bandwidth gain adjustment. 3) An inside-OpAmp dc-offset canceler – it saves the silicon area required for realizing a large time constant on chip while maximizing its highpass-pole switchability for fast dc-offset transient.
The last part presents experimental results of the 3 tailor-made building blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS process. Previously untold on-/off-chip co-setup for both full-chip and building blocks measurements are described. Not only the building blocks have successfully extended the state-of-the-art boundary in terms of signal bandwidth and supply voltage, the analog-baseband IC has been so far the lowest-voltage-reported solution for IEEE 802.11a/b/g WLAN receivers.

Written for:
Students, professors, researchers, engineers working on the wireless transceivers IC design from both academic institutes and industry

handchief581

留位置哈
第七本
Analysis and Design of Quadrature Oscillators

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Analysis and Design of Quadrature OscillatorsSeries: Analog Circuits and Signal Processing Oliveira, L.B., Fernandes, J.R., Filanovsky, I.M., Verhoeven, C.J.M., Silva, M.M. 2008, XIV, 162 p., Hardcover ISBN: 978-1-4020-8515-4

About this book
The following features of Analysis and Design of Quadrature Oscillators make it different from the existing literature on electronic oscillators:

• focus on quadrature oscillators with accurate quadrature and low phase-noise, required by modern communication systems;
• a detailed comparative study of quadrature LC and RC oscillators, including cross-coupled LC quasi-sinusoidal oscillators, cross-coupled RC relaxation oscillators, a quadrature RC oscillator-mixer, and two-integrator oscillators;
• a thorough investigation of the effect of mismatches on the phase-error and the phase-noise;
• the conclusion that quadrature RC oscillators can be a practical alternative to LC oscillators when area and cost should be minimized (in cross-coupled RC oscillators both the quadrature-error and phase-noise are reduced, whereas in LC oscillators the coupling increases the phase-noise);
• use of a structured design approach, in which a technology independent study, with ideal blocks, is performed initially, and then the circuit level design is addressed;
• inclusion of many experimental results, obtained from different integrated circuit prototypes, in the GHz range.

Written for:
Post-graduate students, design engineers and researchers in the fields of radio frequency integrated circuits, analog electronics and circuit design as well as wireless communications

handchief581

第八本
Baseband Analog Circuits for Software Defined Radio

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Baseband Analog Circuits for Software Defined RadioSeries: Analog Circuits and Signal Processing Giannini, Vito, Craninckx, Jan, Baschirotto, Andrea 2008, XIV, 142 p., Hardcover ISBN: 978-1-4020-6537-8

About this book
By the end of this decade, a 4G wireless terminal will be available that provides high quality multimedia, personalized services, and ubiquitous multi-standard broadband connectivity with a reasonable power consumption. In this context, a multi-band transceiver is needed that provides a high-level of programmability while keeping low design complexity and costs. Software Defined Radio (SDR) is the most promising technology to implement such a terminal as it enables multi-mode reception by tuning to any frequency band, by selecting any channel bandwidth, and by detecting any modulation.

Baseband Analog Circuits for Software Defined Radio aims to describe the transition towards a Software Radio from the analog design perspective. As the original idea of a "full-digital" Software Radio is far from the state-of-art, an analog front-end is still needed to achieve a feasible implementation. Most of the existent front-end architectures are explored from the flexibility point of view. A complete overview of the actual state-of-art for reconfigurable transceivers is given in detail, focusing on the challenges imposed by flexibility in analog design.

As far as the design of adaptive analog circuits is concerned, specifications like bandwidth, gain, noise, resolution and linearity should be programmable. The development of circuit topologies and architectures that can be easily reconfigured while providing a near optimal power/performance trade-offs is a key challenge. In this book, we tackle this challenge mainly for baseband analog circuits, i.e. amplifiers and filters, proposing efficient solutions that provide a high level of programmability. Measurements results validate the design strategies.

Written for:
Graduate students working in wireless communications and analog IC design; technical professionals in the communication and IC design industry who have interest in delving into the SDR technology; technical managers and researchers in both academia and industry

handchief581

Biopotential Readout Circuits for Portable Acquisition Systems

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Biopotential Readout Circuits for Portable Acquisition SystemsSeries: Analog Circuits and Signal Processing Yazicioglu, Refet Firat, Van Hoof, Chris, Puers, Robert 2009, XVI, 164 p., Hardcover ISBN: 978-1-4020-9092-9

About this book
In recent years, we have witnessed a revolutionary change in biomedical signal monitoring. The traditional way of using bulky instruments is being replaced by portable and even wearable acquisition systems with wireless data transmission that will enable many non-clinical applications that rely on biomedical signal monitoring. The main driver applications are early-warning systems, wellness, comfort and sports monitoring, brain-computer interfaces, gaming and entertainment. The common requirements from all these applications are miniature size, unobtrusiveness, high signal quality, and long-term power autonomy. This requires ultra-low-power and miniature SiP/SoC biomedical signal acquisition systems.
Biopotential Readout Circuits for Portable Acquisition Systems describes one of the main building blocks of such miniaturized biomedical signal acquisition systems. The focus of this book is on the implementation of low-power and high-performance integrated circuit building blocks that can be used to extract biopotential signals from conventional biopotential electrodes. New instrumentation amplifier architectures are introduced and their design is described in detail. These amplifiers are used to implement complete acquisition demonstrator systems that are a stepping stone towards practical miniaturized and low-power systems.

Written for:
Scientists, academia and companies conducting R&D on integrated circuit design for biomedical signal extraction (ECG, EEG, EMG, EOG, local field potentials, neural spikes, etc.), ultra-low power readout circuit design, brain-computer interfaces, portable ECG and holter monitors, portable EEG for gaming applications, remote health monitoring, remote comfort monitoring, acquisition systems for neurofeedback applications, acquisition systems for signal monitoring during sports