Springer Analog circuits and signal processing serials (总共36本, 搜集了30本)

handchief581

第十八本
High-Level Modeling and Synthesis of Analog Integrated Systems

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High-Level Modeling and Synthesis of Analog Integrated SystemsSeries: Analog Circuits and Signal Processing Martens, Ewout S.J., Gielen, Georges G.E. 2008, XXII, 275 p., Hardcover ISBN: 978-1-4020-6801-0 Online version available

About this book
Various approaches for finding optimal values for the parameters of analog cells, like op amps, have been investigated since the mid-1980s, and they have made their entrance in commercial applications. However, a larger impact on the performance is expected if tools are developed which operate on a higher abstraction level and consider multiple architectural choices to realize a particular functionality. High-Level Modeling and Synthesis of Analog Integrated Systems examines the opportunities, conditions, problems, solutions and systematic methodologies for this new generation of analog CAD tools.
A new design paradigm is defined for high-level synthesis of AMS systems: the high-level design flow based on generic behavior. This design approach involves a modeling strategy using generic behavioral models and a synthesis strategy leading to the exploration of a heterogeneous design space containing different architectures. In High-Level Modeling and Synthesis of Analog Integrated Systems, two novel generic behavioral models are described. The first one adopts a time-domain approach and is suited for classes like Delta-Sigma modulators and sampled-data systems. For the second model, a new frequency-domain framework has been developed (the Phase- Frequency Transfer model) which allows the representation of classes of RF systems like front-ends of wireless receivers. To complete the high-level design strategy, the synthesis strategy has been concretized with a new top-down heterogeneous optimization algorithm.
The general high-level design methodology for AMS systems and its concrete applications developed in this book serve as a fundamental framework for a new generation of analog CAD tools. By providing support for automated design space exploration at the architectural level, they realize an increase in design productivity.

Written for:
Graduate level students, professionals and researchers in the areas of analog circuit design and electronic design automation and developers of analog CAD tools

handchief581

第十九本
High-Resolution IF-to-Baseband SigmaDelta ADC for Car Radios

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High-Resolution IF-to-Baseband SigmaDelta ADC for Car RadiosSeries: Analog Circuits and Signal Processing Silva, Paulo G.R., Huijsing, Johan H. 2008, XII, 220 p., Hardcover ISBN: 978-1-4020-8163-7

About this book
High-Resolution IF-to-Baseband SigmaDelta ADC for Car Radios addresses the theory, system level design and circuit implementation of a high-resolution continuous-time IF-to-baseband quadrature SigmaDelta ADC. The target application of this ADC is in AM/FM/IBOC car radios. The ADC achieves a dynamic range of 118dB, which eliminates the need for an IF VGA or AM channel filter in car radios.

Written for:
Integrated Circuit designers, professional and students, interested in CMOS mixed-signal design, data converters (ADCs & DACs), SD modulators, complex signal processing, precision electronics, and integrated transceivers; radio designers interested in DSP based radio, AM/FM radio and highly integrated receivers; designers/researchers of ADCs used in radio receivers and high-resolution applications

handchief581

第二十本
Inductive Powering
要到今年六月份初,到时候大虾们帮帮忙哈

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Inductive PoweringBasic Theory and Application to Biomedical Systems Series: Analog Circuits and Signal Processing Van Schuylenbergh, Koenraad, Puers, Robert 2009, Approx. 250 p., Hardcover ISBN: 978-90-481-2411-4

About this book
Inductive powering has been a reliable and simple method for many years to wirelessly power devices over relatively short distances, from a few centimetres to a few feet. Examples are found in biomedical applications, such as cochlear implants; in RFID, such as smart cards for building access control; and in consumer devices, such as electrical toothbrushes. Device sizes shrunk considerably the past decades, demanding accurate design tools to obtain reliable link operation in demanding environments. With smaller coil sizes, the link efficiency drops dramatically to a point where the commonly used calculation methods become invalid.
Inductive Powering: Basic Theory and Application to Biomedical Systems is a complete reference for the inductive link designer. It bundles the information scattered throughout literature into a set of consistent formulations allowing engineers to grasp the calculus in full clarity. A general formalism is given for a wide array of applications, ranging from strong to very weak coil coupling. Without loosing universal applicability, the book then focuses on weak coupling (k < 1%) where the existing approximate formulae fail, and demonstrates that the design of the coil driver must be included in the optimisation flow. It provides step-by-step instructions that boost the performance of links originally confined to some microwatts, to several milliwatts without increasing the dimensions. The book lists all design equations and topology alternatives to successfully build an inductive power and data link for your specific application. It also contains practical guidelines to expand the external driver with a servomechanism that automatically tunes itself to varying coupling and load conditions.

Written for:
Scientists, academia and companies conducting R&D on wireless energy supply systems, inductive powering of implanted systems, biomedical engineering

handchief581

第二十一本
IQ Calibration Techniques for CMOS Radio Transceivers

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IQ Calibration Techniques for CMOS Radio TransceiversSeries: Analog Circuits and Signal Processing Chen, Sao-Jie, Hsieh, Yong-Hsiang 2006, XIX, 90 p., Hardcover ISBN: 978-1-4020-5082-4

About this book
In the market of wireless communication, high data-rate transmission and high spectral efficiency have been the trend. The IEEE 802.11 a/g standards working at 5GHz/2.4GHz ISM bands can support data rate up to 54Mbits/s using OFDM modulation. The newly proposed 802.11n technology now uses 64-QAM to achieve higher spectral efficiency. The DVB and many other systems will also use QAM for its data transmission.
The cost of achieving this higher spectral efficiency using higher order QAM is that the transmitter and receiver requires a higher signal to noise ratio (SNR) with the same level of error rate performance (relative to a baseline BPSK, QPSK and other systems). One of the dominant vectors on SNR degradation is I/Q image rejection (I/Q gains and phases imbalance).
There are a lot of factors that degrade the matching of gains and phases between I/Q signals: the instinct layout mismatch, the random mismatch of the devices, the different temperatures over the I/Q signal paths. IQ Calibration Techniques For CMOS Radio Transceivers describes a fully-analog compensation technique without baseband circuitry to control the calibration process. This book will use an 802.11g transceiver design as an example to give a detailed description on the I/Q gains and phases imbalance auto-calibration mechanism.

Written for:
RF transceiver designers, RF IC designers, RF system designers, analog IC designers, and graduate level students in analog / RF degree

[ 本帖最后由 handchief581 于 2009-2-26 19:03 编辑 ]

handchief581

第二十二本
Low Power UWB CMOS Radar Sensors

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Low Power UWB CMOS Radar SensorsSeries: Analog Circuits and Signal Processing Paulino, Nuno, Goes, João, Steiger Garção, Adolfo 2008, VIII, 236 p., Hardcover ISBN: 978-1-4020-8409-6

About this book
Low Power UWB CMOS Radar Sensors deals with the problem of designing low cost CMOS radar sensors. The radar sensor uses UWB signals in order to obtain a reasonable target separation capability, while maintaining a maximum signal frequency below 2 GHz. This maximum frequency value is well within the reach of current CMOS technologies. The use of UWB signals means that most of the methodologies used in the design of circuits and systems that process narrow band signals, can no longer be applied. Low Power UWB CMOS Radar Sensors provides an analysis between the interaction of UWB signals, the antennas and the processing circuits. This analysis leads to some interesting conclusions on the types of antennas and types of circuits that should be used. A methodology to compare the noise performance of UWB processing circuits is also derived. This methodology is used to analyze and design the constituting circuits of the radar transceiver. In order to validate the design methodology a CMOS prototype is designed and experimentally evaluated.

Written for:
Analogue and RF IC designers, post-graduate students

handchief581

第二十三本
Low-Frequency Noise in Advanced MOS Devices

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Low-Frequency Noise in Advanced MOS DevicesSeries: Analog Circuits and Signal Processing Haartman, Martin v., Östling, Mikael 2007, XV, 216 p., Hardcover ISBN: 978-1-4020-5909-4

About this book
Low-Frequency Noise in Advanced CMOS Devices begins with an introduction to noise, describing the fundamental noise sources and basic circuit analysis. The characterization of low-frequency noise is discussed in detail and useful practical advice is given. The various theoretical and compact low-frequency (1/f) noise models in MOS transistors are treated extensively providing an in-depth understanding of the low-frequency noise mechanisms and the potential sources of the noise in MOS transistors. Advanced CMOS technology including nanometer scaled devices, strained Si, SiGe, SOI, high-k gate dielectrics, multiple gates and metal gates are discussed from a low-frequency noise point of view. Some of the most recent publications and conference presentations are included in order to give the very latest view on the topics. The book ends with an introduction to noise in analog/RF circuits and describes how the low-frequency noise can affect these circuits.

Written for:
Researchers, professionals and graduate students in the field of semiconductors, electronics and circuits and systems

handchief581

第二十四本
Low-Power High-Speed ADCs for Nanometer CMOS Integration

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Low-Power High-Speed ADCs for Nanometer CMOS IntegrationSeries: Analog Circuits and Signal Processing Cao, Zhiheng, Yan, Shouli 2008, XIV, 94 p., Hardcover ISBN: 978-1-4020-8449-2

About this book
Low-Power High-Speed ADCs for Nanometer CMOS Integration is about the design and implementation of ADC in nanometer CMOS processes that achieve lower power consumption for a given speed and resolution than previous designs, through architectural and circuit innovations that take advantage of unique features of nanometer CMOS processes. A phase lock loop (PLL) clock multiplier has also been designed using new circuit techniques and successfully tested.

1) A 1.2V, 52mW, 210MS/s 10-bit two-step ADC in 130nm CMOS occupying 0.38mm2. Using offset canceling comparators and capacitor networks implemented with small value interconnect capacitors to replace resistor ladder/multiplexer in conventional sub-ranging ADCs, it achieves 74dB SFDR for 10MHz and 71dB SFDR for 100MHz input.
2) A 32mW, 1.25GS/s 6-bit ADC with 2.5GHz internal clock in 130nm CMOS. A new type of architecture that combines flash and SAR enables the lowest power consumption, 6-bit >1GS/s ADC reported to date. This design can be a drop-in replacement for existing flash ADCs since it does require any post-processing or calibration step and has the same latency as flash.
3) A 0.4ps-rms-jitter (integrated from 3kHz to 300MHz offset for >2.5GHz) 1-3GHz tunable, phase-noise programmable clock-multiplier PLL for generating sampling clock to the SAR ADC. A new loop filter structure enables phase error preamplification to lower PLL in-band noise without increasing loop filter capacitor size.

Written for:
CMOS analog/RF design engineers, graduate students in the field of nanometer CMOS analog/RF circuit design

handchief581

第二十五本
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters
这个也没有搞到,这本书在Springer的网站上说是明天出版

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Offset Reduction Techniques in High-Speed Analog-to-Digital ConvertersAnalysis, Design and Tradeoffs Series: Analog Circuits and Signal Processing Figueiredo, Pedro M., Vital, João C. 2009, XX, 384 p., Hardcover ISBN: 978-1-4020-9715-7

About this book
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

Since the offset voltages of the constituting sub-blocks of these converters (pre-amplifiers, folding circuits and latched comparators) present the definitive linearity limitation, the offset is the fundamental design parameter in high-speed CMOS ADCs. Consequently, offset reduction techniques must be employed, in order to achieve high frequency operation with low power and layout area. Averaging and offset sampling are the most widely used, both being thoroughly characterized:

• the most exhaustive study ever performed about averaging in both pre-amplifier and folding stages is presented, covering the DC and transient responses, all mismatch sources, termination, and a fully automated design procedure;
  
• existing offset sampling methods are carefully reviewed, and two new techniques are disclosed that, combined, yield a (nearly) offset free comparator.
  

Other relevant topics include kickback noise elimination in comparators, reference buffer design, a technique to compensate (certain) IR drops, details on the layout and floorplan of cascaded folding stages, and an improved scheme to select reference voltages in fine ADCs of two-step subranging converters. Special emphasis is given to the methods of guaranteeing specifications across process, temperature and supply voltage corners.

Written for:
Students, professors, researchers and engineers working in data conversion solutions from both academic institutes and industry

handchief581

第二十六本
Omnidirectional Inductive Powering for Biomedical Implants

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Omnidirectional Inductive Powering for Biomedical ImplantsSeries: Analog Circuits and Signal Processing Lenaerts, Bert, Puers, Robert 2009, XVI, 224 p., Hardcover ISBN: 978-1-4020-9074-5

About this book
In the year 2000, a capsule endoscope was introduced on the market for diagnosis of small bowel diseases. This pill, about one centimeter in diameter, takes images of the gastric track and transmits them wirelessly to the outside world. Since the capsule is battery powered, the limited energy budget restricts both the amount and the quality of images that can be shot. To resolve this limitation, Omnidirectional Inductive Powering for Biomedical Implants investigates the feasibility of inductive powering for capsule endoscopy and freely moving systems in general. The main challenge is the random position and orientation of the power receiving system with respect to the emitting magnetic field. Where classic inductive powering assumes a predictable or fixed alignment of the respective coils, the remote system is now free to adopt just any orientation while still maintaining full power capabilities. Before elaborating on different approaches towards omnidirectional powering, the design and optimisation of a general inductive power link is discussed in all its aspects. Useful rectifier and inverter topologies are presented, including a class E driver that copes with coil deformations. Special attention is paid to the interaction of the inductive power link with the patient’s body. Putting theory into practice, the implementation of an inductive power link for a capsule endoscope is included in a separate chapter.

Written for:
Scientists, academia and companies conducting R&D on biomedical engineering, wireless energy supply systems, inductive powering of implanted systems, magnetic powerfields with human interface, inductive links to free ranging systems in a confined space

handchief581

第二十七本
Precision Temperature Sensors in CMOS Technology

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Precision Temperature Sensors in CMOS TechnologySeries: Analog Circuits and Signal Processing Pertijs, Michiel A.P., Huijsing, Johan H. 2006, XII, 304 p., Hardcover ISBN: 978-1-4020-5257-6

About this book
This book describes the analysis and design of precision temperature sensors in CMOS IC technology. It focusses on so-called smart temperature sensors, which provide a digital output signal that can be readily interpreted by a computer. The sensors described in this book are based on bipolar transistors, which are available as parasitic devices in standard CMOS technology. The relevant physical properties of these devices are described. It is shown in detail how their temperature characteristics can be used to obtain an accurate digital temperature reading. A sigma-delta converter plays a key role in the conversion to a digital output. Both the system-level design of such a converter, and the circuit-level implementation using both continuous-time and switched-capacitor techniques are described. Special attention is paid to the application of precision interfacing techniques, such as dynamic offset cancellation and dynamic element matching. A separate chapter is devoted to low-cost calibration techniques. Precision Temperature Sensors in CMOS Technology ends with a detailed description of three realized prototypes. The final prototype achieves an inaccuracy of only ±0.1&ordm;C (3Sigma) over the temperature range of –55&ordm;C to 125&ordm;C, which is the highest performance reported to date.

Written for:
Analog integrated circuit designers, more specifically users/designers of integrated temperature sensors