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Abstract—We describe a general offset-canceling architecture
for analog multiplication using chopper stabilization. Chopping
is used to modulate the offset away from the output signal where
it can be easily filtered out, providing continuous offset reduction
which is insensitive to drift. Both square wave chopping and
chopping with orthogonal spreading codes are tested and shown
to reduce the offset down to the microvolt level. In addition, we
apply the nested chopping technique to an analog multiplier which
employs two levels of chopping to reduce the offset even further.
We discuss the limits on the performance of the various chopping
methods in detail, and present a detailed analysis of the residual
offset due to charge injection spikes. An illustrative CMOS prototype
in a 0.18 m process is presented which achieves a worst-case
offset of 1.5 V. This is the lowest measured offset reported in
the DC analog multiplier literature by a margin of two orders of
magnitude. The prototype multiplier is also tested with AC inputs
as a squarer, variable gain amplifier, and direct-conversion mixer,
demonstrating that chopper stabilization is effective for both DC
and AC multiplication. The AC measurements show that chopping
removes not only offset, but also 1 noise and second-order
harmonic distortion.
Index Terms—Analog multiplier, chopper stabilization, mixer,
offset cancellation, variable gain amplifier.
Chopper Stabilization of Analog Multipliers, Variable Gain Amplifiers, and Mixers.pdf
(2.17 MB, 下载次数: 1023 )
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