Clock Domain Crossing (CDC) Design & Verification

harold · 发表于 2009-1-11 00:24:51

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ABSTRACTImportant design considerations require that multi-clock designs be carefully constructed atClock Domain Crossing (CDC) boundaries. This paper details some of the latest strategies andbest known methods to address passing of one and multiple signals across a CDC boundary.Included in the paper are techniques related to CDC verification and an interesting 2-deep FIFOdesign for passing multiple control signals between clock domains. Although the design methodsdescribed in the paper can be generally implemented using any HDL, the examples are shownusing efficient SystemVerilog techniques.
Hope it is helpful

harold · 发表于 2009-1-11 00:25:57

忘了贴附件

harold · 发表于 2009-1-11 00:27:58

littletreeggg · 发表于 2009-1-11 16:21:08

好贴！谢楼主

nieyangboshi · 发表于 2009-1-16 13:55:26

好贴！谢楼主

opqfeixue · 发表于 2009-3-20 21:50:29

谢谢了！！！

ayamitek · 发表于 2009-8-11 08:58:30

Thanks for sharing ..............dink dink

edalover · 发表于 2010-3-9 16:13:50

tahksa

longyv424 · 发表于 2010-4-15 09:41:08

我来看看

wsgwz2004 · 发表于 2010-4-27 09:14:09

没有附件啊，在下面是吧
1# harold

Clock Domain Crossing (CDC) Design & Verification

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