【Steven H. Voldman 2008年 最新大作】Latchup ！

benemale

这样Voldman的四本大作都齐了，其他3本顺便给大家提供一下链接，好收藏哈~~~~

ESD: Physics and Devices

ESD: Circuits and Devices

ESD: RF Technology and Circuits



新增Voldman 2009年最新大作

ESD: Failure Mechanisms and Models

[ 本帖最后由 benemale 于 2009-8-3 21:11 编辑 ]

benemale

                               
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[size=120%]Latchup
By Steven H. Voldman

• Publisher:   Wiley
• Number Of Pages:   472
• Publication Date:   2008-02-25
• ISBN-10 / ASIN:   0470016426
• ISBN-13 / EAN:   9780470016428
• Binding:   Hardcover

Product Description:

Interest in latchup is being renewed with the evolution of complimentary metal-oxide semiconductor (CMOS) technology, metal-oxide-semiconductor field-effect transistor (MOSFET) scaling, and high-level system-on-chip (SOC) integration. Clear methodologies that grant protection from latchup, with insight into the physics, technology and circuit issues involved, are in increasing demand. This book describes CMOS and BiCMOS semiconductor technology and their sensitivity to present day latchup phenomena, from basic over-voltage and over-current conditions, single event latchup (SEL) and cable discharge events (CDE), to latchup domino phenomena. It contains chapters focusing on bipolar physics, latchup theory, latchup and guard ring characterization structures, characterization testing, product level test systems, product level testing and experimental results. Discussions on state-of-the-art semiconductor processes, design layout, and circuit level and system level latchup solutions are also included, as well as:

• latchup semiconductor process solutions for both CMOS to BiCMOS, such as shallow trench, deep trench, retrograde wells, connecting implants, sub-collectors, heavily-doped buried layers,  and buried grids – from single- to triple-well CMOS;
• practical latchup design methods, automated and bench-level latchup testing methods and techniques, latchup theory of logarithm resistance space, generalized alpha  (a) space, beta (b) space, new latchup design methods– connecting the theoretical to the practical analysis, and;
• examples of  latchup computer aided design (CAD) methodologies, from design rule checking (DRC) and logical-to-physical design,  to new latchup CAD methodologies that address latchup for internal and external latchup on a local as well as global design level.

Latchup acts as a companion text to the author’s series of books on ESD (electrostatic discharge) protection, serving as an invaluable reference for the professional semiconductor chip and system-level ESD engineer. Semiconductor device, process and circuit designers, and quality, reliability and failure analysis engineers will find it informative on the issues that confront modern CMOS technology.  Practitioners in the automotive and aerospace industries will also find it useful. In addition, its academic treatment will appeal to both senior and graduate students with interests in semiconductor process, device physics, computer aided design and design integration.

[ 本帖最后由 benemale 于 2008-10-17 23:23 编辑 ]

ysliu168

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qwip

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qwip

Thanks again.

jacocobi

Many thanks... awesome....

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sheng347

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hainihao

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maxman99

Thanks for sharing!!!!