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发表于 2025-11-21 19:14:21
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Initializing floorplan completed.
Use advanced legalizer engine : 0
Information: The stitching and editing of coupling caps is turned OFF for design 'ASAP7_4x.dlib:ac97_top.design'. (TIM-125)
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
Information: Design Average RC for design ac97_top (NEX-011)
Information: r = 0.814033 ohm/um, via_r = 4.043135 ohm/cut, c = 0.113232 ff/um, cc = 0.000000 ff/um (X dir) (NEX-017)
Information: r = 0.913866 ohm/um, via_r = 4.702241 ohm/cut, c = 0.146524 ff/um, cc = 0.000000 ff/um (Y dir) (NEX-017)
Number of Site types in the design = 1
Setting up Chip Core
Chip Core shape: (0 0) (1641600 1641600)
Number of unique PDs = 1
Number of Power Domains = 1
Number of Voltage Areas = 1
Number of supply Nets = 2
Number of used supplies = 2
Running merge clock gates
Setting all modes active.
Information: CTS will work on the following scenarios. (CTS-101)
default (Mode: default; Corner: default)
Information: CTS will work on all clocks in active scenarios, including 1 master clocks and 0 generated clocks. (CTS-107)
Information: Clock derating is disabled
CTS related app options set by user:
No CTS related app option is set.
MCG (merge_clock_gates) Statistics: ICG
ICG 0
Attempt 0
Survivor 0
Removed 0
Total ICG at the end 0
Clearing enable all modes setting.
MCG (merge_clock_gates) Statistics: Total
ICG 0
Attempt 0
Survivor 0
Removed 0
Total ICG at the end 0
Number of Site types in the design = 1
Setting up Chip Core
Chip Core shape: (0 0) (1641600 1641600)
Number of unique PDs = 1
Number of Power Domains = 1
Number of Voltage Areas = 1
Number of supply Nets = 2
Number of used supplies = 2
INFO: sweep stats: 0 gates / 0 nets gobbled, 0 gates (0 seq) simplified
Running initial placement
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running create_placement
Information: The RC mode used is VR for design 'ac97_top'. (NEX-022)
Information: Update timing completed net estimation for all the timing graph nets (TIM-111)
Information: Net estimation statistics: timing graph nets = 7806, routed nets = 0, across physical hierarchy nets = 0, parasitics cached nets = 0, delay annotated nets = 0, parasitics annotated nets = 0, multi-voltage nets = 0. (TIM-112)
Warning: turning e-eLpp off because no active dynamic power scenarios were found
Placement Options:
Effort: high_effort
Timing Driven: true
Buffering Aware Timing Driven: true
Seed locs: false
Incremental: false
Congestion: false
Printing options for 'place.coarse.*' (non-default only)
place.coarse.continue_on_missing_scandef : true
Start transferring placement data.
Restructuring in 1 hierarchies
CGRW: importing permutable pins & pairs, size 8 and above
Information: Automatic timing control is enabled.
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
DTDP placement: scenario=default
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
Warning: Issue with unoptModel initialization for libcell ac97_top. Using default values.
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
Warning: Technology layer 'M1' setting 'pitch' is not valid (NEX-001)
Warning: Technology layer 'Pad' setting 'pitch' is not valid (NEX-001)
Warning: Parasitic Tech Library layer 'Pad' parameter 'WMIN' = 0.880 does not match 0.160 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'Pad' parameter 'SMIN' = 0.880 does not match 8.000 of technology file (NEX-007)
Segmentation fault encountered.
Detailed stack trace :
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