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关于内嵌滤波器的ADC设计的,谢谢!
[1] S. Huang et al., "A 70dB SNDR 80MHz BW Filter-Embedded Pipeline-SAR ADC Achieving 172dB FoMs with Progressive Conversion and Floating-Charge-Transfer Amplifier," 2025 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2025, pp. 318-320.
[2] X. Xin et al., "A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 6, pp. 2293-2305, June 2023.
[3] D. T. Lin, L. Li, S. Farahani and M. P. Flynn, "A flexible 500MHz to 3.6GHz wireless receiver with configurable DT FIR and IIR filter embedded in a 7b 21MS/s SAR ADC," IEEE Custom Integrated Circuits Conference 2010, San Jose, CA, USA, 2010, pp. 1-4.
[4] P. Harpe, "A Compact 10-b SAR ADC With Unit-Length Capacitors and a Passive FIR Filter," in IEEE Journal of Solid-State Circuits, vol. 54, no. 3, pp. 636-645, March 2019.
[5] N. Dolev, M. Kramer and B. Murmann, "A 12-bit, 200-MS/s, 11.5-mW pipeline ADC using a pulsed bucket brigade front-end," 2013 Symposium on VLSI Circuits, Kyoto, Japan, 2013, pp. C98-C99.
[6] C. -Y. Wang, J. -H. Tsai, S. -Y. Su, J. -C. Tsai, J. -R. Chen and C. -H. Lou, "20.6 An 80MHz-BW 31.9fJ/conv-step Filtering ΔΣ ADC with a Built-In DAC-Segmentation/ELD-Compensation 6b 960MS/s SAR-Quantizer in 28nm LP for 802.11ax Applications," 2019 IEEE International Solid-State Circuits Conference - (ISSCC), San Francisco, CA, USA, 2019, pp. 338-340. |
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