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1 A 1.8 V, 10 bit, 500 mega samples per second parallel pipelined analog-to-digital converter
2 A built-in self-test for a 1.8 V, 8 bit, 125 mega samples per second pipelined analog-to-digital converter
3 Design of an oscillation-based built-in self-test system for a 1.8 V, 8 bit, 125 mega samples per second pipelined analog-to-digital converter
4 An oscillation-based built-in self-test (BIST) system for dynamic performance parameter evaluation of an 8 bit, 100 MSPS pipelined ADC
5 A reconfigurable built-in self-test architecture for a pipelined ADC
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