请问CML与LVDS的区别是什么

linxin2018

                               
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这是2006年一篇讨论CML与LVDS的手册里的图。按我的理解就是LVDS是一个由严格电平标准的接口标准，CML相对自由。

按照维基的定义：he basic principle of CML is that [color=var(--color-progressive,#36c)]current from a [color=var(--color-progressive,#36c)]constant current generator is steered between two alternate paths depending on whether a logic zero or logic one is being represented. Typically, the generator is connected to the two sources of a pair of differential [color=var(--color-progressive,#36c)]FETs, with the two paths being their two drains. The [color=var(--color-progressive,#36c)]bipolar equivalent [color=var(--color-progressive,#36c)]emitter-coupled logic (ECL) operates similarly, with the output being taken from the collectors of the BJT transistors.

按这个定义LVDS也是在两个环路之间切换啊。

还有我看很多文章和手册里都提到CML位于放大区比LVDS的饱和区可以做的更快，但这不是同一个意思吗。我个人的理解是在早期CML多使用BJT工艺速率更快，这个说法保留下来，是否现在不适用了呢？

linxin2018

顶。。。。。。。。。

huangsirbuhui

https://blog.csdn.net/weixin_453 ... -blog-127271096.235^v43^pc_blog_bottom_relevance_base8&spm=1001.2101.3001.4242.1&utm_relevant_index=3

linxin2018

huangsirbuhui 发表于 2024-8-2 15:06
https://blog.csdn.net/weixin_45365488/article/details/135659566?utm_medium=distribute.pc_relevant.no ...

您好，这也没说LVDS与CML的区别呀，只有互连的接口