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本帖最后由 totuwei 于 2024-5-3 00:15 编辑
某知名外企内推CAE岗,需全程英文面试,boss是美国人,如有兴趣请加微信:tuwei81
JD description: ExperienceRequirements / Qualifications: - You have more than 10 years of relevant front-end digital ASIC design experience, from RTL to synthesis
- Minimum 5 years of relevant experience in complex System-on-Chip architecture
- In-depth understanding of multi-CPU subsystems architecture,cache coherency and memory hierarchies
- Understanding of SoC system level architectures
- Understanding of CPU integration, bus fabrics, DDR
- Familiarity with the ARM ecosystem: CPU, GPU, etc.
- Good experience with RTL synthesis, DC, DC-topo, RTLA, FusionCompiler
- You are customer focused and enjoy working with them to help them find solutions
- You have experience in a customer facing role and/or working with a sales team
- You are highly motivated, excellent problem solver and results-driven
- You have good presentation and organizational skills
- Motivated to train and educate others and help them solve complex problems
- You are a team player who can take initiatives
- This position requires being able to travel to North America 2-3 times per year
- You are passionate about your job;
- You are an excellent problem solver;
- You are a solid communicator;
- You are results driven; and,
- You have empathy for the complex problems being served by ourcustomers.
EducationRequirements: - BS/MS in Electrical Engineering
work site: Shanghai, Beijing and Shenzhen
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