求书

Sxiaojie · 发表于 2024-1-11 15:22:51

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Design Challenges in High-Voltage ICs
Parasitic MOS and Bipolar Transistors in CMOS ICs
大家有这两本书吗

Twonej · 发表于 2024-1-11 16:26:57

这两篇是书里的文章：
Design Challenges in High-Voltage ICs是Parasitic Substrate Coupling in High Voltage Integrated Circuits的pp 11–39
Parasitic MOS and Bipolar Transistors in CMOS ICs是How Transistor Area Shrank by 1 Million Fold的pp 67–72

How Transistor Area Shrank by 1 Million Fold.pdf (14.63 MB, 下载次数: 27 )

Parasitic Substrate Coupling in High Voltage Integrated Circuits.pdf (7.87 MB, 下载次数: 30 )