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https://ieeexplore.ieee.org/document/9531880
A 0.025% DC Current Mismatch Charge Pump for PLL ApplicationsPublisher: IEEE
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[url=][size=1.15]PDF[/url]
[size=0.87][size=0.87]Shengyu Liang; Youze Xin; Chenglong Liang; Bin Zhang; Yanlong Zhang; Xiaoli Wang; Li Geng
[url=]All Authors[/url]
https://ieeexplore.ieee.org/document/9531880
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[size=1em]Document Sections
- [size=0.9em][url=]I.
Introduction
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Conventional CP Circuits and Matching Methods
[/url] - [size=0.9em][url=]III.
Current Mismatch and Proposed Charge Pump
[/url] - [size=0.9em][url=]IV.
Simulation results
[/url] - [size=0.9em][url=]V.
Conclusion
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Abstract:Charge pump (CP) based PLL is one of the most popular techniques because of its wide capture range and zero static phase offset. An op-amp is used to achieve dynamic current matching in the conventional double op-amp CP. This paper proposes a CP, which adopts simple level shift source follower to match the output voltages of two current mirrors when the output voltage of CP changes. Because one of the high-speed op-amps is deleted, the power consumption and area are cut down without sacrificing the current matching performance. The proposed CP achieves less than 0.025% DC current mismatch with 400 μA charge pump current under 1.2V supply when the output voltage changes from 0.3V to 0.9V in a standard 55 nm CMOS process.
Published in: 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
Date of Conference: 09-11 August 2021
Date Added to IEEE Xplore: 13 September 2021
ISBN Information:
ISSN Information:
INSPEC Accession Number: 21159299
DOI: 10.1109/MWSCAS47672.2021.9531880
Publisher: IEEE
Conference Location: Lansing, MI, USA
Funding Agency:
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