If software uses an omitted RISC-V instruction from an optional extension, the hardware traps and executes the desired function in software as part of a standard library.
You implement the hardware instructions in software. When the software tries to execute the unimplemented instruction the CPU traps and will call a function instead, the function that's called is defined with instructions that the CPU can execute, when the function returns, the instruction is done. I don't think RISC-V is the first to do this.